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| author | Andrew Jeffery <andrew@aj.id.au> | 2021-06-23 06:38:53 +0300 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2021-06-24 12:23:50 +0300 |
| commit | 311b4ed8cbcc0e9132e239f92ac77ce709f74b48 (patch) | |
| tree | dafd0642ba183c7546497ef1370a5ba30fcbe8b2 | |
| parent | 0455fc0eefecd58c93b8fcdd208761c40c0d26ab (diff) | |
| download | linux-311b4ed8cbcc0e9132e239f92ac77ce709f74b48.tar.xz | |
ARM: dts: aspeed: p10bmc: Switch to KCS 3 for MCTP binding
The reset state of the status bits on KCS 4 is inappropriate for the
MCTP LPC binding. Switch to KCS 3 which has a different reset behaviour.
OpenBMC-Staging-Count: 1
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210623033854.587464-7-andrew@aj.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
| -rw-r--r-- | arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts index d899c9620286..738785390fa3 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts @@ -4088,7 +4088,7 @@ memory-region = <&vga_memory>; }; -&kcs4 { +&kcs3 { status = "okay"; aspeed,lpc-io-reg = <0xca2>; aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>; diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts index 9ac07200b03a..34fbb720c613 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts @@ -1750,7 +1750,7 @@ memory-region = <&vga_memory>; }; -&kcs4 { +&kcs3 { status = "okay"; aspeed,lpc-io-reg = <0xca2>; aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>; |