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authorAndrew Jeffery <andrew@aj.id.au>2021-06-28 04:36:05 +0300
committerJoel Stanley <joel@jms.id.au>2021-06-28 07:04:02 +0300
commitdd1e9367157f900616f0eae3cef897c23d4e7452 (patch)
tree9ffda4163bf18aeac42206dc246542703fe7261d
parent8478885d8ca216478760c08e92a7fa2720d4600c (diff)
downloadlinux-dd1e9367157f900616f0eae3cef897c23d4e7452.tar.xz
ARM: dts: everest: Add phase corrections for eMMC
The values were determined experimentally via boot tests, not by measuring the bus behaviour with a scope. We plan to do scope measurements to confirm or refine the values and will update the devicetree if necessary once these have been obtained. However, with the patch we can write and read data without issue, where as booting the system without the patch failed at the point of mounting the rootfs. OpenBMC-Staging-Count: 1 Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20210628013605.1257346-1-andrew@aj.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
-rw-r--r--arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
index 43d998e39f65..7aaa92395b35 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
@@ -2832,6 +2832,7 @@
&emmc {
status = "okay";
+ clk-phase-mmc-hs200 = <180>, <180>;
};
&fsim0 {