diff options
author | Steven Lee <steven_lee@aspeedtech.com> | 2021-09-07 12:55:25 +0300 |
---|---|---|
committer | Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> | 2021-10-20 01:10:40 +0300 |
commit | 035b6967edb65346ac1a23ae338eee77d301e29c (patch) | |
tree | f42cefacd5b5bc52055c78c98343221806ac4085 | |
parent | 5d0476de3fbcc8d01f25c65633af0f16f6d930ec (diff) | |
download | linux-035b6967edb65346ac1a23ae338eee77d301e29c.tar.xz |
gpio: gpio-aspeed-sgpio: Fix wrong hwirq in irq handler.
The current hwirq is calculated based on the old GPIO pin order(input
GPIO range is from 0 to ngpios - 1).
It should be calculated based on the current GPIO input pin order(input
GPIOs are 0, 2, 4, ..., (ngpios - 1) * 2).
Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
-rw-r--r-- | drivers/gpio/gpio-aspeed-sgpio.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpio/gpio-aspeed-sgpio.c b/drivers/gpio/gpio-aspeed-sgpio.c index 191b82a2560c..b94609b420f0 100644 --- a/drivers/gpio/gpio-aspeed-sgpio.c +++ b/drivers/gpio/gpio-aspeed-sgpio.c @@ -395,7 +395,7 @@ static void aspeed_sgpio_irq_handler(struct irq_desc *desc) reg = ioread32(bank_reg(data, bank, reg_irq_status)); for_each_set_bit(p, ®, 32) { - girq = irq_find_mapping(gc->irq.domain, i * 32 + p); + girq = irq_find_mapping(gc->irq.domain, i * 32 + p * 2); generic_handle_irq(girq); } |