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authorConor Dooley <conor.dooley@microchip.com>2024-05-08 18:46:51 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2024-05-17 12:56:22 +0300
commit4e73c01b612bed98557f36032bd12260a62cc34f (patch)
tree6ac0d4e62e6ded1741c794311414c3142f5ff1bc
parent07b933a1b62d0f12b7921d6d69346c9a35e9ea97 (diff)
downloadlinux-4e73c01b612bed98557f36032bd12260a62cc34f.tar.xz
spi: microchip-core-qspi: fix setting spi bus clock rate
commit ef13561d2b163ac0ae6befa53bca58a26dc3320b upstream. Before ORing the new clock rate with the control register value read from the hardware, the existing clock rate needs to be masked off as otherwise the existing value will interfere with the new one. CC: stable@vger.kernel.org Fixes: 8596124c4c1b ("spi: microchip-core-qspi: Add support for microchip fpga qspi controllers") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240508-fox-unpiloted-b97e1535627b@spud Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/spi/spi-microchip-core-qspi.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/spi-microchip-core-qspi.c b/drivers/spi/spi-microchip-core-qspi.c
index 19a6a46829f6..620c5d19031e 100644
--- a/drivers/spi/spi-microchip-core-qspi.c
+++ b/drivers/spi/spi-microchip-core-qspi.c
@@ -283,6 +283,7 @@ static int mchp_coreqspi_setup_clock(struct mchp_coreqspi *qspi, struct spi_devi
}
control = readl_relaxed(qspi->regs + REG_CONTROL);
+ control &= ~CONTROL_CLKRATE_MASK;
control |= baud_rate_val << CONTROL_CLKRATE_SHIFT;
writel_relaxed(control, qspi->regs + REG_CONTROL);
control = readl_relaxed(qspi->regs + REG_CONTROL);