summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorConor Dooley <conor.dooley@microchip.com>2024-05-08 18:46:51 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2024-05-17 13:15:09 +0300
commit4ec012171604507a72e314c46592bcb6db0d317e (patch)
tree340f7c9e7be8209945e69fd6694f164f319f02fc
parentebed91287cb58098c11c309e514a98fe7656aa7d (diff)
downloadlinux-4ec012171604507a72e314c46592bcb6db0d317e.tar.xz
spi: microchip-core-qspi: fix setting spi bus clock rate
commit ef13561d2b163ac0ae6befa53bca58a26dc3320b upstream. Before ORing the new clock rate with the control register value read from the hardware, the existing clock rate needs to be masked off as otherwise the existing value will interfere with the new one. CC: stable@vger.kernel.org Fixes: 8596124c4c1b ("spi: microchip-core-qspi: Add support for microchip fpga qspi controllers") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240508-fox-unpiloted-b97e1535627b@spud Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/spi/spi-microchip-core-qspi.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/spi-microchip-core-qspi.c b/drivers/spi/spi-microchip-core-qspi.c
index 03d125a71fd9..09f16471c537 100644
--- a/drivers/spi/spi-microchip-core-qspi.c
+++ b/drivers/spi/spi-microchip-core-qspi.c
@@ -283,6 +283,7 @@ static int mchp_coreqspi_setup_clock(struct mchp_coreqspi *qspi, struct spi_devi
}
control = readl_relaxed(qspi->regs + REG_CONTROL);
+ control &= ~CONTROL_CLKRATE_MASK;
control |= baud_rate_val << CONTROL_CLKRATE_SHIFT;
writel_relaxed(control, qspi->regs + REG_CONTROL);
control = readl_relaxed(qspi->regs + REG_CONTROL);