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authorLinus Torvalds <torvalds@linux-foundation.org>2024-05-14 19:41:26 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2024-05-14 19:41:26 +0300
commita9d9ce3fbc2761e69c5daeb99156a5d06eb79ae5 (patch)
tree8b54aa5db145a320197dfece7b24fefbdca2af46 /arch
parent2d9db778ddca079228ef10e60bceea06b34b0eaa (diff)
parent455f9075f14484f358b3c1d6845b4a438de198a7 (diff)
downloadlinux-a9d9ce3fbc2761e69c5daeb99156a5d06eb79ae5.tar.xz
Merge tag 'x86-timers-2024-05-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 timers update from Thomas Gleixner: "A single update for the TSC synchronixation sanity checks: The sad state of TSC being notoriously non-sychronized for several decades caused the kernel to grow quite rigorous sanity checks to detect whether the TSC is valid to be used for timekeeping. The TSC ADJUST MSR provides the offset between the initial TSC value after hardware reset and later modifications. This allows to detect cases where firmware tampers with the TSC and also allows to correct the firmware induced damage by resetting the offset in a controlled way. The universal correct rule is that the TSC ADJUST value has to be consistent within all CPUs of a socket. The kernel further assumes that the TSC offset should be consistent between sockets. That's not really correct as systems with a huge number of sockets are not architecurally guaranteed to reset the per socket TSC base synchronously. In case that the per socket offset is not consistent the kernel resets it to the offset of the boot CPU and then does a synchronization check which corrects for the inter socket delays. That works most of the time, but it is suboptimal as the firmware has eventually better information about the per socket offset and on sane systems that offset should just work in the validation checks" * tag 'x86-timers-2024-05-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/tsc: Trust initial offset in architectural TSC-adjust MSRs
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/tsc_sync.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c
index 1123ef3ccf90..4334033658ed 100644
--- a/arch/x86/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
@@ -193,11 +193,9 @@ bool tsc_store_and_check_tsc_adjust(bool bootcpu)
cur->warned = false;
/*
- * If a non-zero TSC value for socket 0 may be valid then the default
- * adjusted value cannot assumed to be zero either.
+ * The default adjust value cannot be assumed to be zero on any socket.
*/
- if (tsc_async_resets)
- cur->adjusted = bootval;
+ cur->adjusted = bootval;
/*
* Check whether this CPU is the first in a package to come up. In