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authorEmil Renner Berthing <kernel@esmil.dk>2021-11-20 23:33:08 +0300
committerEmil Renner Berthing <emil.renner.berthing@canonical.com>2024-05-08 12:38:23 +0300
commitcf175eece693f5a93a0f54d2ecee6fdd6edeebcd (patch)
tree5b7f32c78a635f142aeef469ea3992ff2395f655
parentce18c9a47181aa82850c750f31484cd90aed3d4c (diff)
downloadlinux-cf175eece693f5a93a0f54d2ecee6fdd6edeebcd.tar.xz
riscv: dts: starfive: Add StarFive JH7100 audio reset node
Add device tree node for the audio resets on the StarFive JH7100 RISC-V SoC. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
-rw-r--r--arch/riscv/boot/dts/starfive/jh7100.dtsi6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi
index f2d8f18c0dc9..0216a32bbff4 100644
--- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
@@ -249,6 +249,12 @@
#clock-cells = <1>;
};
+ audrst: reset-controller@10490000 {
+ compatible = "starfive,jh7100-audrst";
+ reg = <0x0 0x10490000 0x0 0x10000>;
+ #reset-cells = <1>;
+ };
+
clkgen: clock-controller@11800000 {
compatible = "starfive,jh7100-clkgen";
reg = <0x0 0x11800000 0x0 0x10000>;