random: Cater for low CONFIG_HZ when evaluating cycle counter for jitter entropy generation

MAX_SAMPLES_PER_BIT is defined as HZ / 15.
However, because of the use of integer division, when HZ < 15, MAX_SAMPLES_BIT_PER_BIT becomes 0. On Linux with CONFIG_HZ < 15, this causes kernel to always assume cycle counter is not suitable for generating jitter entropy.

Empirically, this assumption is not true on Dubhe FPGA with CONFIG_HZ_10, because regardless of the low CONFIG_HZ, Dubhe’s cycle counter is still able to produce entropy very fast, such that stack.samples_per_bit = 1.

Thus, this commit uses round-up when computing MAX_SAMPLES_PER_BIT:
MAX_SAMPLES_PER_BIT = DIV_ROUND_UP(HZ, 15) instead of simply HZ / 15.
This way, on Dubhe FPGA with CONFIG_HZ_10, we get MAX_SAMPLES_PER_BIT = 1, and the speed check in try_to_generate_entropy() will pass, which then allows the use of cycle counter to generate jitter entropy.

With this commit, Dubhe is now able to reach “crng init done” quickly whenever entropy is needed by a program during boot (ssh-keygen used by Buildroot's sshd).

Signed-off-by: Tan En De <ende.tan@starfivetech.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/char/random.c b/drivers/char/random.c
index 5d1c8e1c99b5..96df0092c0a5 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -1246,7 +1246,7 @@ static void __cold entropy_timer(struct timer_list *timer)
  */
 static void __cold try_to_generate_entropy(void)
 {
-	enum { NUM_TRIAL_SAMPLES = 8192, MAX_SAMPLES_PER_BIT = HZ / 15 };
+	enum { NUM_TRIAL_SAMPLES = 8192, MAX_SAMPLES_PER_BIT = DIV_ROUND_UP(HZ, 15) };
 	struct entropy_timer_state stack;
 	unsigned int i, num_different = 0;
 	unsigned long last = random_get_entropy();