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| author | Tan En De <ende.tan@starfivetech.com> | 2023-03-08 05:38:45 +0300 |
|---|---|---|
| committer | Ley Foon Tan <leyfoon.tan@starfivetech.com> | 2023-12-04 06:00:14 +0300 |
| commit | d0a801ba51665aff39dde65cc855c18cbea99188 (patch) | |
| tree | 499a027530bbfca9cf059ab656d02967a18807ae | |
| parent | 658bcf208c649193a5e5ad7e43966a6428288950 (diff) | |
| download | linux-d0a801ba51665aff39dde65cc855c18cbea99188.tar.xz | |
riscv: dts: dubhe: Disable vector
Dubhe doesn't yet support vector extension.
Signed-off-by: Tan En De <ende.tan@starfivetech.com>
| -rw-r--r-- | arch/riscv/boot/dts/starfive/dubhe.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/riscv/boot/dts/starfive/dubhe.dtsi b/arch/riscv/boot/dts/starfive/dubhe.dtsi index 885164d89c10..561dd0ed790c 100644 --- a/arch/riscv/boot/dts/starfive/dubhe.dtsi +++ b/arch/riscv/boot/dts/starfive/dubhe.dtsi @@ -25,7 +25,7 @@ i-tlb-size = <32>; mmu-type = "riscv,sv48"; reg = <0x0>; - riscv,isa = "rv64imafdcbhnv"; + riscv,isa = "rv64imafdcbhn"; tlb-split; cpu0_intc: interrupt-controller { #interrupt-cells = <1>; @@ -47,7 +47,7 @@ i-tlb-size = <32>; mmu-type = "riscv,sv48"; reg = <0x1>; - riscv,isa = "rv64imafdcbhnv"; + riscv,isa = "rv64imafdcbhn"; tlb-split; cpu1_intc: interrupt-controller { #interrupt-cells = <1>; |