diff options
Diffstat (limited to 'arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi')
| -rw-r--r-- | arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 1049 |
1 files changed, 1049 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi new file mode 100644 index 000000000000..1014f0aa72c0 --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -0,0 +1,1049 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2022 StarFive Technology Co., Ltd. + * Copyright (C) 2022 Hal Feng <hal.feng@starfivetech.com> + */ + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/starfive,jh7110-pinfunc.h> +#include "jh7110.dtsi" +#include "codecs/sf_pwmdac.dtsi" + +/ { + model = "StarFive VisionFive V2"; + compatible = "starfive,visionfive-v2", "starfive,jh7110"; + + aliases { + spi0 = &qspi; + gpio0 = &gpio; + ethernet0 = &gmac0; + ethernet1 = &gmac1; + mmc0 = &mmc0; + mmc1 = &mmc1; + serial0 = &uart0; + serial3 = &uart3; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + }; + + chosen { + linux,initrd-start = <0x0 0x46100000>; + linux,initrd-end = <0x0 0x4c000000>; + stdout-path = "serial0:115200"; + #bootargs = "debug console=ttyS0 rootwait"; + }; + + cpus { + timebase-frequency = <4000000>; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x0 0x40000000 0x1 0x0>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x0 0x20000000>; + alignment = <0x0 0x1000>; + alloc-ranges = <0x0 0x70000000 0x0 0x20000000>; + linux,cma-default; + }; + + e24_mem: e24@c0000000 { + reg = <0x0 0x6ce00000 0x0 0x1600000>; + }; + + xrp_reserved: xrpbuffer@f0000000 { + reg = <0x0 0x69c00000 0x0 0x01ffffff + 0x0 0x6bc00000 0x0 0x00001000 + 0x0 0x6bc01000 0x0 0x00fff000 + 0x0 0x6cc00000 0x0 0x00001000>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-ack { + gpios = <&gpioa 3 GPIO_ACTIVE_HIGH>; + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_HEARTBEAT; + linux,default-trigger = "heartbeat"; + label = "ack"; + }; + }; + + thermal-zones { + cpu-thermal { + polling-delay-passive = <250>; + polling-delay = <15000>; + + thermal-sensors = <&sfctemp>; + + trips { + cpu_alert0: cpu_alert0 { + /* milliCelsius */ + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit: cpu_crit { + /* milliCelsius */ + temperature = <100000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; +}; + +&gpio { + i2c0_pins: i2c0-pins { + i2c0-pins-scl { + starfive,pins = <PAD_GPIO57>; + starfive,pinmux = <PAD_GPIO57_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>; + starfive,pin-gpio-dout = <GPO_LOW>; + starfive,pin-gpio-doen = <OEN_I2C0_IC_CLK_OE>; + starfive,pin-gpio-din = <GPI_I2C0_IC_CLK_IN_A>; + }; + + i2c0-pins-sda { + starfive,pins = <PAD_GPIO58>; + starfive,pinmux = <PAD_GPIO58_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>; + starfive,pin-gpio-dout = <GPO_LOW>; + starfive,pin-gpio-doen = <OEN_I2C0_IC_DATA_OE>; + starfive,pin-gpio-din = <GPI_I2C0_IC_DATA_IN_A>; + }; + }; + + i2c5_pins: i2c5-pins { + i2c5-pins-scl { + starfive,pins = <PAD_GPIO19>; + starfive,pinmux = <PAD_GPIO19_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>; + starfive,pin-gpio-dout = <GPO_LOW>; + starfive,pin-gpio-doen = <OEN_I2C5_IC_CLK_OE>; + starfive,pin-gpio-din = <GPI_I2C5_IC_CLK_IN_A>; + }; + + i2c5-pins-sda { + starfive,pins = <PAD_GPIO20>; + starfive,pinmux = <PAD_GPIO20_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>; + starfive,pin-gpio-dout = <GPO_LOW>; + starfive,pin-gpio-doen = <OEN_I2C5_IC_DATA_OE>; + starfive,pin-gpio-din = <GPI_I2C5_IC_DATA_IN_A>; + }; + }; + + i2c6_pins: i2c6-pins { + i2c6-pins-scl { + starfive,pins = <PAD_GPIO16>; + starfive,pinmux = <PAD_GPIO16_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>; + starfive,pin-gpio-dout = <GPO_LOW>; + starfive,pin-gpio-doen = <OEN_I2C6_IC_CLK_OE>; + starfive,pin-gpio-din = <GPI_I2C6_IC_CLK_IN_A>; + }; + + i2c6-pins-sda { + starfive,pins = <PAD_GPIO17>; + starfive,pinmux = <PAD_GPIO17_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>; + starfive,pin-gpio-dout = <GPO_LOW>; + starfive,pin-gpio-doen = <OEN_I2C6_IC_DATA_OE>; + starfive,pin-gpio-din = <GPI_I2C6_IC_DATA_IN_A>; + }; + }; + + pwmdac0_pins: pwmdac0-pins { + pwmdac0-pins-left { + starfive,pins = <PAD_GPIO33>; + starfive,pinmux = <PAD_GPIO33_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>; + starfive,pin-gpio-dout = <GPO_PWMDAC0_LEFT_OUTPUT>; + starfive,pin-gpio-doen = <OEN_LOW>; + }; + + pwmdac0-pins-right { + starfive,pins = <PAD_GPIO34>; + starfive,pinmux = <PAD_GPIO34_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>; + starfive,pin-gpio-dout = <GPO_PWMDAC0_RIGHT_OUTPUT>; + starfive,pin-gpio-doen = <OEN_LOW>; + }; + }; + + pwm_pins: pwm-pins { + pwm_ch0-pins { + starfive,pins = <PAD_GPIO46>; + starfive,pinmux = <PAD_GPIO46_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-dout = <GPO_PTC0_PWM_0>; + starfive,pin-gpio-doen = <OEN_PTC0_PWM_0_OE_N>; + }; + + pwm_ch1-pins { + starfive,pins = <PAD_GPIO59>; + starfive,pinmux = <PAD_GPIO59_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-dout = <GPO_PTC0_PWM_1>; + starfive,pin-gpio-doen = <OEN_PTC0_PWM_1_OE_N>; + }; + }; + + ssp0_pins: ssp0-pins { + ssp0-pins_tx { + starfive,pins = <PAD_GPIO52>; + starfive,pinmux = <PAD_GPIO52_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-dout = <GPO_SPI0_SSPTXD>; + starfive,pin-gpio-doen = <OEN_LOW>; + }; + + ssp0-pins_rx { + starfive,pins = <PAD_GPIO53>; + starfive,pinmux = <PAD_GPIO53_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-doen = <OEN_HIGH>; + starfive,pin-gpio-din = <GPI_SPI0_SSPRXD>; + }; + + ssp0-pins_clk { + starfive,pins = <PAD_GPIO48>; + starfive,pinmux = <PAD_GPIO48_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-dout = <GPO_SPI0_SSPCLKOUT>; + starfive,pin-gpio-doen = <OEN_LOW>; + }; + + ssp0-pins_cs { + starfive,pins = <PAD_GPIO49>; + starfive,pinmux = <PAD_GPIO49_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-dout = <GPO_SPI0_SSPFSSOUT>; + starfive,pin-gpio-doen = <OEN_LOW>; + }; + }; + + pcie0_perst_default: pcie0_perst_default { + perst-pins { + starfive,pins = <PAD_GPIO26>; + starfive,pinmux = <PAD_GPIO26_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-dout = <GPO_HIGH>; + starfive,pin-gpio-doen = <OEN_LOW>; + }; + }; + + pcie0_perst_active: pcie0_perst_active { + perst-pins { + starfive,pins = <PAD_GPIO26>; + starfive,pinmux = <PAD_GPIO26_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-dout = <GPO_LOW>; + starfive,pin-gpio-doen = <OEN_LOW>; + }; + }; + + pcie0_wake_default: pcie0_wake_default { + wake-pins { + starfive,pins = <PAD_GPIO32>; + starfive,pinmux = <PAD_GPIO32_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-doen = <OEN_HIGH>; + }; + }; + + pcie0_clkreq_default: pcie0_clkreq_default { + clkreq-pins { + starfive,pins = <PAD_GPIO27>; + starfive,pinmux = <PAD_GPIO27_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-doen = <OEN_HIGH>; + }; + }; + + pcie1_perst_default: pcie1_perst_default { + perst-pins { + starfive,pins = <PAD_GPIO28>; + starfive,pinmux = <PAD_GPIO28_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-dout = <GPO_HIGH>; + starfive,pin-gpio-doen = <OEN_LOW>; + }; + }; + + pcie1_perst_active: pcie1_perst_active { + perst-pins { + starfive,pins = <PAD_GPIO28>; + starfive,pinmux = <PAD_GPIO28_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-dout = <GPO_LOW>; + starfive,pin-gpio-doen = <OEN_LOW>; + }; + }; + + pcie1_wake_default: pcie1_wake_default { + wake-pins { + starfive,pins = <PAD_GPIO21>; + starfive,pinmux = <PAD_GPIO21_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-doen = <OEN_HIGH>; + }; + }; + + pcie1_clkreq_default: pcie1_clkreq_default { + clkreq-pins { + starfive,pins = <PAD_GPIO29>; + starfive,pinmux = <PAD_GPIO29_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-doen = <OEN_HIGH>; + }; + }; + + usb_pins: usb-pins { + drive-vbus-pin { + starfive,pins = <PAD_GPIO25>; + starfive,pinmux = <PAD_GPIO25_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-dout = <GPO_USB0_DRIVE_VBUS_IO>; + starfive,pin-gpio-doen = <OEN_LOW>; + }; + }; + + i2srx_pins: i2srx-pins { + i2srx-pins0 { + starfive,pins = <PAD_GPIO61>; + starfive,pinmux = <PAD_GPIO61_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-doen = <OEN_HIGH>; + starfive,pin-gpio-din = <GPI_I2SRX0_EXT_SDIN0>; + }; + }; + + i2s_clk_pins: i2s-clk0 { + i2s-clk0_bclk { + starfive,pins = <PAD_GPIO38>; + starfive,pinmux = <PAD_GPIO38_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-din = <GPI_I2STX0_BCLK_SLV GPI_I2SRX0_BCLK_SLV>; + starfive,pin-gpio-doen = <OEN_HIGH>; + }; + + i2s-clk0_lrclk { + starfive,pins = <PAD_GPIO63>; + starfive,pinmux = <PAD_GPIO63_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-din = <GPI_I2STX0_LRCK_SLV GPI_I2SRX0_LRCK_SLV>; + starfive,pin-gpio-doen = <OEN_HIGH>; + }; + }; + + i2stx_pins: i2stx-pins { + i2stx-pins0 { + starfive,pins = <PAD_GPIO44>; + starfive,pinmux = <PAD_GPIO44_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-dout = <GPO_I2STX_4CH1_SDO0>; + starfive,pin-gpio-doen = <OEN_LOW>; + }; + }; + + tdm0_pins: tdm0-pins { + tdm0-pins-tx { + starfive,pins = <PAD_GPIO44>; + starfive,pinmux = <PAD_GPIO44_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-dout = <GPO_TDM0_PCM_TXD>; + starfive,pin-gpio-doen = <OEN_LOW>; + }; + + tdm0-pins-rx { + starfive,pins = <PAD_GPIO61>; + starfive,pinmux = <PAD_GPIO61_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-doen = <OEN_HIGH>; + starfive,pin-gpio-din = <GPI_TDM0_PCM_RXD>; + }; + + tdm0-pins-sync { + starfive,pins = <PAD_GPIO63>; + starfive,pinmux = <PAD_GPIO63_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-doen = <OEN_HIGH>; + starfive,pin-gpio-din = <GPI_TDM0_PCM_SYNCIN>; + }; + + tdm0-pins-pcmclk { + starfive,pins = <PAD_GPIO38>; + starfive,pinmux = <PAD_GPIO38_FUNC_SEL 0>; + starfive,pin-ioconfig = <IO(GPIO_IE(1))>; + starfive,pin-gpio-doen = <OEN_HIGH>; + starfive,pin-gpio-din = <GPI_TDM0_CLK_SLV>; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&dma { + status = "okay"; +}; + +&trng { + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&sec_dma { + status = "okay"; +}; + +&i2c0 { + clock-frequency = <100000>; + i2c-sda-hold-time-ns = <300>; + i2c-sda-falling-time-ns = <510>; + i2c-scl-falling-time-ns = <510>; + auto_calc_scl_lhcnt; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + i2c-sda-hold-time-ns = <300>; + i2c-sda-falling-time-ns = <510>; + i2c-scl-falling-time-ns = <510>; + auto_calc_scl_lhcnt; + status = "okay"; + + seeed_plane_i2c@45 { + compatible = "seeed_panel"; + reg = <0x45>; + + port { + panel_out0: endpoint { + remote-endpoint = <&dsi0_output>; + }; + }; + }; + + tinker_ft5406: tinker_ft5406@38 { + compatible = "tinker_ft5406"; + reg = <0x38>; + }; + + touchscreen@14 { + compatible = "goodix,gt911"; + reg = <0x14>; + irq-gpios = <&gpio 30 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio 31 GPIO_ACTIVE_HIGH>; + }; + + panel_radxa@19 { + compatible ="starfive_jadard"; + reg = <0x19>; + reset-gpio = <&gpio 23 0>; + enable-gpio = <&gpio 22 0>; + + port { + panel_out1: endpoint { + remote-endpoint = <&dsi1_output>; + }; + }; + }; + +}; + +&i2c5 { + clock-frequency = <100000>; + i2c-sda-hold-time-ns = <300>; + i2c-sda-falling-time-ns = <510>; + i2c-scl-falling-time-ns = <510>; + auto_calc_scl_lhcnt; + pinctrl-names = "default"; + pinctrl-0 = <&i2c5_pins>; + status = "okay"; + + eeprom@50 { + compatible = "atmel,24c04"; + reg = <0x50>; + pagesize = <16>; + }; + + pmic: axp15060_reg@36 { + compatible = "x-powers,axp15060"; + reg = <0x36>; + + regulators { + mipi_0p9: ALDO1 { + regulator-boot-on; + regulator-compatible = "aldo1"; + regulator-name = "mipi_0p9"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + }; + + hdmi_0p9: ALDO5 { + regulator-boot-on; + regulator-compatible = "aldo5"; + regulator-name = "hdmi_0p9"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + }; + + hdmi_1p8: ALDO3 { + regulator-boot-on; + regulator-compatible = "aldo3"; + regulator-name = "hdmi_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + sdio_vdd: ALDO4 { + regulator-boot-on; + regulator-always-on; + regulator-compatible = "aldo4"; + regulator-name = "sdio_vdd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vcc_3v3: DCDC1 { + regulator-boot-on; + regulator-always-on; + regulator-compatible = "dcdc1"; + regulator-name = "vcc_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + cpu_vdd: DCDC2 { + regulator-boot-on; + regulator-always-on; + regulator-compatible = "dcdc2"; + regulator-name = "cpu_vdd"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1540000>; + }; + }; + }; +}; + +&i2c6 { + clock-frequency = <100000>; + i2c-sda-hold-time-ns = <300>; + i2c-sda-falling-time-ns = <510>; + i2c-scl-falling-time-ns = <510>; + auto_calc_scl_lhcnt; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6_pins>; + status = "okay"; + + imx219: imx219@10 { + compatible = "sony,imx219"; + reg = <0x10>; + clocks = <&clk_ext_camera>; + clock-names = "xclk"; + reset-gpio = <&gpio 18 0>; + rotation = <0>; + orientation = <1>; //CAMERA_ORIENTATION_BACK + + port { + /* CSI2 bus endpoint */ + imx219_to_csi2rx0: endpoint { + remote-endpoint = <&csi2rx0_from_imx219>; + bus-type = <4>; /* MIPI CSI-2 D-PHY */ + clock-lanes = <4>; + data-lanes = <0 1>; + lane-polarities = <0 0 0>; + link-frequencies = /bits/ 64 <456000000>; + }; + }; + }; + + imx708: imx708@1a { + compatible = "sony,imx708"; + reg = <0x1a>; + clocks = <&clk_ext_camera>; + reset-gpio = <&gpio 18 0>; + + port { + imx708_to_csi2rx0: endpoint { + remote-endpoint = <&csi2rx0_from_imx708>; + data-lanes = <1 2>; + clock-noncontinuous; + link-frequencies = /bits/ 64 <450000000>; + }; + }; + }; + + ov4689: ov4689@36 { + compatible = "ovti,ov4689"; + reg = <0x36>; + clocks = <&clk_ext_camera>; + clock-names = "xclk"; + rotation = <180>; + + port { + /* Parallel bus endpoint */ + ov4689_to_csi2rx0: endpoint { + remote-endpoint = <&csi2rx0_from_ov4689>; + bus-type = <4>; /* MIPI CSI-2 D-PHY */ + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&mmc0 { + max-frequency = <100000000>; + assigned-clocks = <&clkgen JH7110_SDIO0_CLK_SDCARD>; + assigned-clock-rates = <50000000>; + card-detect-delay = <300>; + bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + non-removable; + cap-mmc-hw-reset; + post-power-on-delay-ms = <200>; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&sdio_vdd>; + status = "okay"; +}; + +&mmc1 { + max-frequency = <100000000>; + assigned-clocks = <&clkgen JH7110_SDIO1_CLK_SDCARD>; + assigned-clock-rates = <50000000>; + card-detect-delay = <300>; + bus-width = <4>; + no-sdio; + no-mmc; + broken-cd; + cap-sd-highspeed; + post-power-on-delay-ms = <200>; + status = "okay"; +}; + +&vin_sysctl { + /* when use dvp open this pinctrl*/ + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + /* CSI2 bus endpoint */ + csi2rx0_from_imx219: endpoint@0 { + reg = <0>; + remote-endpoint = <&imx219_to_csi2rx0>; + bus-type = <4>; /* MIPI CSI-2 D-PHY */ + clock-lanes = <4>; + data-lanes = <0 1>; + lane-polarities = <0 0 0>; + status = "okay"; + }; + + csi2rx0_from_imx708: endpoint@1 { + reg = <1>; + remote-endpoint = <&imx708_to_csi2rx0>; + bus-type = <4>; /* MIPI CSI-2 D-PHY */ + clock-lanes = <4>; + data-lanes = <0 1>; + lane-polarities = <0 0 0>; + status = "okay"; + }; + + csi2rx0_from_ov4689: endpoint@2 { + reg = <2>; + remote-endpoint = <&ov4689_to_csi2rx0>; + bus-type = <4>; /* MIPI CSI-2 D-PHY */ + clock-lanes = <4>; + data-lanes = <0 1>; + status = "okay"; + }; + }; + }; +}; + +&sfctemp { + status = "okay"; +}; + +&jpu { + status = "okay"; +}; + +&vpu_dec { + status = "okay"; +}; + +&vpu_enc { + status = "okay"; +}; + +&gmac0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "gtx", + "tx", + "ptp_ref", + "stmmaceth", + "pclk", + "gtxc", + "rmii_rtx"; + clocks = <&clkgen JH7110_GMAC0_GTXCLK>, + <&clkgen JH7110_U0_GMAC5_CLK_TX>, + <&clkgen JH7110_GMAC0_PTP>, + <&clkgen JH7110_U0_GMAC5_CLK_AHB>, + <&clkgen JH7110_U0_GMAC5_CLK_AXI>, + <&clkgen JH7110_GMAC0_GTXC>, + <&clkgen JH7110_GMAC0_RMII_RTX>; + + phy0: ethernet-phy@0 { + rgmii_sw_dr_2 = <0x0>; + rgmii_sw_dr = <0x3>; + rgmii_sw_dr_rxc = <0x6>; + rxc_dly_en = <0>; + rx_delay_sel = <0xa>; + tx_delay_sel_fe = <5>; + tx_delay_sel = <0xa>; + tx_inverted_10 = <0x1>; + tx_inverted_100 = <0x1>; + tx_inverted_1000 = <0x1>; + }; +}; + +&gmac1 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + clock-names = "gtx", + "tx", + "ptp_ref", + "stmmaceth", + "pclk", + "gtxc", + "rmii_rtx"; + clocks = <&clkgen JH7110_GMAC1_GTXCLK>, + <&clkgen JH7110_GMAC5_CLK_TX>, + <&clkgen JH7110_GMAC5_CLK_PTP>, + <&clkgen JH7110_GMAC5_CLK_AHB>, + <&clkgen JH7110_GMAC5_CLK_AXI>, + <&clkgen JH7110_GMAC1_GTXC>, + <&clkgen JH7110_GMAC1_RMII_RTX>; + + phy1: ethernet-phy@1 { + rgmii_sw_dr_2 = <0x0>; + rgmii_sw_dr = <0x3>; + rgmii_sw_dr_rxc = <0x6>; + tx_delay_sel_fe = <5>; + tx_delay_sel = <0>; + rxc_dly_en = <0>; + rx_delay_sel = <0x2>; + tx_inverted_10 = <0x1>; + tx_inverted_100 = <0x1>; + tx_inverted_1000 = <0x0>; + }; +}; + +&gpu { + status = "okay"; +}; + +&pwmdac { + pinctrl-names = "default"; + pinctrl-0 = <&pwmdac0_pins>; + status = "okay"; +}; + +&i2srx_3ch { + pinctrl-names = "default"; + pinctrl-0 = <&i2s_clk_pins &i2srx_pins>; + status = "disabled"; +}; + +&i2stx_4ch1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2stx_pins>; + status = "disabled"; +}; + +&tdm { + pinctrl-names = "default"; + pinctrl-0 = <&tdm0_pins>; + status = "disabled"; +}; + +&pwmdac_codec { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&ssp0_pins>; + status = "okay"; + + spi_dev0: spi@0 { + compatible = "rohm,dh2228fv"; + pl022,com-mode = <1>; + spi-max-frequency = <10000000>; + reg = <0>; + status = "okay"; + }; +}; + +&pcie0 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie0_wake_default>, + <&pcie0_clkreq_default>; + reset-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&pcie1 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie1_wake_default>, + <&pcie1_clkreq_default>; + reset-gpios = <&gpio 28 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&mailbox_contrl0 { + status = "okay"; +}; + +&mailbox_client0 { + status = "okay"; +}; + +&display { + status = "okay"; +}; + +&hdmi { + status = "okay"; + + hdmi_in: port { + #address-cells = <1>; + #size-cells = <0>; + hdmi_in_lcdc: endpoint@0 { + reg = <0>; + remote-endpoint = <&dc_out_dpi1>; + }; + }; +}; + +&dc8200 { + status = "okay"; + + dc_out: port { + #address-cells = <1>; + #size-cells = <0>; + dc_out_dpi0: endpoint@0 { + reg = <0>; + remote-endpoint = <&hdmi_input0>; + }; + dc_out_dpi1: endpoint@1 { + reg = <1>; + remote-endpoint = <&hdmi_in_lcdc>; + }; + + dc_out_dpi2: endpoint@2 { + reg = <2>; + remote-endpoint = <&mipi_in>; + }; + }; +}; + +&rgb_output { + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + hdmi_input0:endpoint@0 { + reg = <0>; + remote-endpoint = <&dc_out_dpi0>; + }; + }; + }; +}; + +&dsi_output { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mipi_in: endpoint { + remote-endpoint = <&dc_out_dpi2>; + }; + }; + + port@1 { + reg = <1>; + sf_dpi_output: endpoint { + remote-endpoint = <&dsi_in_port>; + }; + }; + }; +}; + +&mipi_dsi { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + dsi0_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&panel_out0>; + }; + + dsi1_output: endpoint@1 { + reg = <1>; + remote-endpoint = <&panel_out1>; + }; + + }; + + port@1{ + reg = <1>; + dsi_in_port: endpoint { + remote-endpoint = <&sf_dpi_output>; + }; + }; + + }; +}; + +&mipi_dphy { + status = "okay"; +}; + +&co_process { + memory-region = <&e24_mem>; + status = "okay"; +}; + +&usbdrd30 { + clocks = <&clkgen JH7110_USB_125M>, + <&clkgen JH7110_USB0_CLK_APP_125>, + <&clkgen JH7110_USB0_CLK_LPM>, + <&clkgen JH7110_USB0_CLK_STB>, + <&clkgen JH7110_USB0_CLK_USB_APB>, + <&clkgen JH7110_USB0_CLK_AXI>, + <&clkgen JH7110_USB0_CLK_UTMI_APB>; + clock-names = "125m","app","lpm","stb","apb","axi","utmi"; + resets = <&rstgen RSTN_U0_CDN_USB_PWRUP>, + <&rstgen RSTN_U0_CDN_USB_APB>, + <&rstgen RSTN_U0_CDN_USB_AXI>, + <&rstgen RSTN_U0_CDN_USB_UTMI_APB>; + reset-names = "pwrup","apb","axi","utmi"; + starfive,usb2-only; + dr_mode = "peripheral"; /*host or peripheral*/ + status = "okay"; +}; + +&xrp { + memory-region = <&xrp_reserved>; + status = "okay"; +}; + +&ptc { + pinctrl-names = "default"; + pinctrl-0 = <&pwm_pins>; + status = "okay"; +}; + +&qspi { + nor_flash: nor-flash@0 { + compatible = "jedec,spi-nor"; + reg=<0>; + cdns,read-delay = <5>; + spi-max-frequency = <100000000>; + cdns,tshsl-ns = <1>; + cdns,tsd2d-ns = <1>; + cdns,tchsh-ns = <1>; + cdns,tslch-ns = <1>; + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + spl@0 { + reg = <0x0 0x40000>; + }; + uboot-env@100000 { + reg = <0xf0000 0x10000>; + }; + uboot@100000 { + reg = <0x100000 0x300000>; + }; + data@f00000 { + reg = <0xf00000 0x100000>; + }; + }; + }; +}; + |