diff options
| author | dramforever <dramforever@live.com> | 2022-06-09 10:07:31 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2022-06-21 06:01:56 +0300 |
| commit | a07402ac9cea19b3af70ed6469bb6d937132a18f (patch) | |
| tree | 22fcbfc17f00c75d5b507ef567dd4093f19db794 | |
| parent | 187127fb89b99790793d4b2663286371b59021ae (diff) | |
| download | opensbi-a07402ac9cea19b3af70ed6469bb6d937132a18f.tar.xz | |
lib: sbi: Fix tval and tinst for sbi_get_insn()
We should not change trap->tval to mepc because mtval already points to
the faulting portion of the emulated instruction fetch, which is also
what stval is expected to be.
In addition, htinst is only allowed to be zero for instruction access
faults or page faults, and is only allowed to be zero or a
psuedoinstruction for instruction guest-page faults. Fix trap->tinst for
these cases.
Signed-off-by: dramforever <dramforever@live.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
| -rw-r--r-- | lib/sbi/sbi_unpriv.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/lib/sbi/sbi_unpriv.c b/lib/sbi/sbi_unpriv.c index 73b530c..9a34a71 100644 --- a/lib/sbi/sbi_unpriv.c +++ b/lib/sbi/sbi_unpriv.c @@ -149,15 +149,17 @@ ulong sbi_get_insn(ulong mepc, struct sbi_trap_info *trap) switch (trap->cause) { case CAUSE_LOAD_ACCESS: trap->cause = CAUSE_FETCH_ACCESS; - trap->tval = mepc; + trap->tinst = 0UL; break; case CAUSE_LOAD_PAGE_FAULT: trap->cause = CAUSE_FETCH_PAGE_FAULT; - trap->tval = mepc; + trap->tinst = 0UL; break; case CAUSE_LOAD_GUEST_PAGE_FAULT: trap->cause = CAUSE_FETCH_GUEST_PAGE_FAULT; - trap->tval = mepc; + if (trap->tinst != INSN_PSEUDO_VS_LOAD && + trap->tinst != INSN_PSEUDO_VS_STORE) + trap->tinst = 0UL; break; default: break; |