diff options
| author | Xiang W <wxjstz@126.com> | 2022-11-24 06:16:05 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2022-12-04 19:22:52 +0300 |
| commit | fc82e84329760540ec62b257c700025ba37cb7ab (patch) | |
| tree | 98d2e441d207338e9e206ef101b189a179c720e3 | |
| parent | 74e20293c45634048d2a3ab045e8531bca904818 (diff) | |
| download | opensbi-fc82e84329760540ec62b257c700025ba37cb7ab.tar.xz | |
lib: sbi: Fix is_region_valid()
When order is equal to __riscv_xlen, the shift operation will not perform
any operation, which will cause reg->base & (BIT(reg->order) - 1) to always
be 0, and the condition has not been established.
This patch fixes this bug.
Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
| -rw-r--r-- | lib/sbi/sbi_domain.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/sbi/sbi_domain.c b/lib/sbi/sbi_domain.c index fec9074..3302213 100644 --- a/lib/sbi/sbi_domain.c +++ b/lib/sbi/sbi_domain.c @@ -146,6 +146,9 @@ static bool is_region_valid(const struct sbi_domain_memregion *reg) if (reg->order < 3 || __riscv_xlen < reg->order) return FALSE; + if (reg->order == __riscv_xlen && reg->base != 0) + return FALSE; + if (reg->base & (BIT(reg->order) - 1)) return FALSE; |