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authorAnup Patel <anup.patel@wdc.com>2019-04-15 09:23:31 +0300
committerAnup Patel <anup@brainfault.org>2019-09-30 12:59:37 +0300
commitbbeb8e619d1cc528d2d56531512d6ea406f9738b (patch)
tree564a440550380b8fe3f5320ccf9c49739a158ae2 /firmware
parent1a5614e971cf44e08342c2b1639fa3be544b0202 (diff)
downloadopensbi-bbeb8e619d1cc528d2d56531512d6ea406f9738b.tar.xz
lib: Extend sbi_trap_redirect() for hypervisor extension
When hypervisor extension is available, we can get traps from VS/VU modes. We should be able to force redirect some of these traps to HS-mode. In other words, we should be able forward traps from VS/VU mode to HS-mode using sbi_trap_redirect() hence this patch. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'firmware')
-rw-r--r--firmware/fw_base.S19
1 files changed, 19 insertions, 0 deletions
diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index f596638..2c198cf 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -486,6 +486,16 @@ _trap_handler_all_mode:
REG_S t0, SBI_TRAP_REGS_OFFSET(mepc)(sp)
csrr t0, CSR_MSTATUS
REG_S t0, SBI_TRAP_REGS_OFFSET(mstatus)(sp)
+ REG_S zero, SBI_TRAP_REGS_OFFSET(mstatusH)(sp)
+#if __riscv_xlen == 32
+ csrr t0, CSR_MISA
+ srli t0, t0, ('H' - 'A')
+ andi t0, t0, 0x1
+ beq t0, zero, _skip_mstatush_save
+ csrr t0, CSR_MSTATUSH
+ REG_S t0, SBI_TRAP_REGS_OFFSET(mstatusH)(sp)
+_skip_mstatush_save:
+#endif
/* Save all general regisers except SP and T0 */
REG_S zero, SBI_TRAP_REGS_OFFSET(zero)(sp)
@@ -560,6 +570,15 @@ _trap_handler_all_mode:
csrw CSR_MEPC, t0
REG_L t0, SBI_TRAP_REGS_OFFSET(mstatus)(sp)
csrw CSR_MSTATUS, t0
+#if __riscv_xlen == 32
+ csrr t0, CSR_MISA
+ srli t0, t0, ('H' - 'A')
+ andi t0, t0, 0x1
+ beq t0, zero, _skip_mstatush_restore
+ REG_L t0, SBI_TRAP_REGS_OFFSET(mstatusH)(sp)
+ csrw CSR_MSTATUSH, t0
+_skip_mstatush_restore:
+#endif
/* Restore T0 */
REG_L t0, SBI_TRAP_REGS_OFFSET(t0)(sp)