summaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
authorMayuresh Chitale <mchitale@ventanamicro.com>2023-03-09 16:13:55 +0300
committerAnup Patel <anup@brainfault.org>2023-03-10 11:30:26 +0300
commitb51ddffcc043fb94ebcbffce7682b2d0deef5afd (patch)
tree6386163c63d5b7ffd91831ae87e7bfa276e81511 /include
parent548e4b4b28b96aa771c2f49a5b255ba6cc26777f (diff)
downloadopensbi-b51ddffcc043fb94ebcbffce7682b2d0deef5afd.tar.xz
lib: sbi_pmu: Update sbi_pmu dev ops
Update fw_event_validate_code, fw_counter_match_code and fw_counter_start ops which used a 32 bit event code to use the 64 bit event data instead. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'include')
-rw-r--r--include/sbi/sbi_pmu.h9
1 files changed, 4 insertions, 5 deletions
diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index b3b75c1..3232e14 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -30,16 +30,15 @@ struct sbi_pmu_device {
/**
* Validate event code of custom firmware event
- * Note: SBI_PMU_FW_MAX <= event_idx_code
*/
- int (*fw_event_validate_code)(uint32_t event_idx_code);
+ int (*fw_event_validate_encoding)(uint64_t event_data);
/**
* Match custom firmware counter with custom firmware event
* Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
*/
- bool (*fw_counter_match_code)(uint32_t counter_index,
- uint32_t event_idx_code);
+ bool (*fw_counter_match_encoding)(uint32_t counter_index,
+ uint64_t event_data);
/**
* Fetch the max width of this counter in number of bits.
@@ -58,7 +57,7 @@ struct sbi_pmu_device {
* Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
*/
int (*fw_counter_start)(uint32_t counter_index,
- uint32_t event_idx_code,
+ uint64_t event_data,
uint64_t init_val, bool init_val_update);
/**