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authorWei Liang Lim <weiliang.lim@starfivetech.com>2023-10-19 11:31:12 +0300
committerWei Liang Lim <weiliang.lim@starfivetech.com>2023-10-19 11:31:12 +0300
commit5aeb63fecf4e006b99d53c1b1a6ceac4fb2a3eca (patch)
treecd6752032841ef9cdcb1dd39e425db0606939ff6
parent569779ec17583d0237e72815299921aec677a84e (diff)
downloadu-boot-5aeb63fecf4e006b99d53c1b1a6ceac4fb2a3eca.tar.xz
dubhe: dwc_eth_qos: Fix errors and set the speed to 10M on FPGA
Signed-off-by: Wei Liang Lim <weiliang.lim@starfivetech.com>
-rw-r--r--arch/riscv/cpu/dubhe/Kconfig1
-rw-r--r--arch/riscv/cpu/jh7110/Kconfig17
-rw-r--r--drivers/net/dwc_eth_qos.c4
-rw-r--r--drivers/net/dwc_eth_qos.h2
4 files changed, 21 insertions, 3 deletions
diff --git a/arch/riscv/cpu/dubhe/Kconfig b/arch/riscv/cpu/dubhe/Kconfig
index 4412843c9f..38e94c96a4 100644
--- a/arch/riscv/cpu/dubhe/Kconfig
+++ b/arch/riscv/cpu/dubhe/Kconfig
@@ -15,3 +15,4 @@ config STARFIVE_DUBHE
imply SPL_CPU
imply SPL_OPENSBI
imply SPL_LOAD_FIT
+ imply MII
diff --git a/arch/riscv/cpu/jh7110/Kconfig b/arch/riscv/cpu/jh7110/Kconfig
index e5549a01b8..25fe25af84 100644
--- a/arch/riscv/cpu/jh7110/Kconfig
+++ b/arch/riscv/cpu/jh7110/Kconfig
@@ -29,3 +29,20 @@ config STARFIVE_JH7110
imply SPL_OPENSBI
imply SPL_RISCV_ACLINT
imply SPL_SYS_MALLOC_CLEAR_ON_INIT
+
+choice
+ prompt "JH7110 GMAC Speed"
+ depends on (STARFIVE_JH7110 || STARFIVE_DUBHE)
+ default FPGA_GMAC_SPEED10
+ help
+ choice JH7110 GMAC speed.
+ (GMAC only works well on 10M/duple, for FPGA board.)
+
+ config FPGA_GMAC_SPEED10
+ bool "GMAC works on 10M mode"
+ config FPGA_GMAC_SPEED100
+ bool "GMAC works on 100M mode"
+ config FPGA_GMAC_SPEED_AUTO
+ bool "GMAC works on auto mode"
+
+endchoice
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index a0ba471365..98678b02ab 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1693,9 +1693,9 @@ err_free_clk_slave_bus:
err_free_clk_master_bus:
clk_free(&eqos->clk_master_bus);
err_free_gpio_phy_reset:
- dm_gpio_free(dev, &eqos->phy_reset_gpio);
+ /* dm_gpio_free(dev, &eqos->phy_reset_gpio); */
err_free_reset_eqos:
- reset_free(&eqos->reset_ctl);
+ /* reset_free(&eqos->reset_ctl); */
return ret;
}
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
index cb2cc74dfd..9948385725 100644
--- a/drivers/net/dwc_eth_qos.h
+++ b/drivers/net/dwc_eth_qos.h
@@ -83,7 +83,7 @@ struct eqos_mac_regs {
#define EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT 16
#define EQOS_MAC_MDIO_ADDRESS_CR_SHIFT 8
#define EQOS_MAC_MDIO_ADDRESS_CR_20_35 2
-#if CONFIG_IS_ENABLED(STARFIVE_JH7110)
+#if defined(STARFIVE_JH7110) || defined(STARFIVE_DUBHE)
#define EQOS_MAC_MDIO_ADDRESS_CR_250_300 9
#else
#define EQOS_MAC_MDIO_ADDRESS_CR_250_300 5