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| author | Wei Liang Lim <weiliang.lim@starfivetech.com> | 2023-10-20 17:45:33 +0300 |
|---|---|---|
| committer | Wei Liang Lim <weiliang.lim@starfivetech.com> | 2023-10-20 17:45:33 +0300 |
| commit | 698f2448fafcf6d2210234f5f7a4f850cecf0965 (patch) | |
| tree | 2671b49ed847088b3aea378d22eedb7094f468e4 | |
| parent | d660ae44986226289fd7d29f3b219c93170c9eb5 (diff) | |
| download | u-boot-698f2448fafcf6d2210234f5f7a4f850cecf0965.tar.xz | |
configs: starfive_dubhe_fpga_defconfig: Update defconfig for Dubhe
Signed-off-by: Wei Liang Lim <weiliang.lim@starfivetech.com>
| -rw-r--r-- | configs/starfive_dubhe_fpga_defconfig | 23 |
1 files changed, 18 insertions, 5 deletions
diff --git a/configs/starfive_dubhe_fpga_defconfig b/configs/starfive_dubhe_fpga_defconfig index 6267f9d5a2..76b1296d8e 100644 --- a/configs/starfive_dubhe_fpga_defconfig +++ b/configs/starfive_dubhe_fpga_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="dubhe_fpga" +CONFIG_SUPPORT_SPL=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y @@ -10,11 +11,13 @@ CONFIG_TARGET_STARFIVE_DUBHE_FPGA=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y # CONFIG_SPL_SMP is not set +CONFIG_SPL_OPENSBI_LOAD_ADDR=0x80100000 CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttySIF0,115200 earlycon=sbi root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait" CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="echo Dubhe FPGA booting from serial flash...; sf probe 1:0; sf read 0x84000000 0x400000 0x1200000; bootm 0x84000000" +#CONFIG_BOOTCOMMAND="echo Dubhe FPGA booting from serial flash...; sf probe 1:0; sf read 0x84000000 0x400000 0x1200000; bootm 0x84000000" +CONFIG_BOOTCOMMAND="" CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y @@ -49,23 +52,33 @@ CONFIG_MMC=y CONFIG_MMC_SPI=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x84000000 +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000 CONFIG_SPL_BSS_START_ADDR=0x80300000 CONFIG_SPL_BSS_MAX_SIZE=0x00100000 CONFIG_SPL_MAX_SIZE=0x00200000 -CONFIG_SYS_MALLOC_LEN=0x00100000 +CONFIG_SYS_MALLOC_LEN=0x6400000 CONFIG_SYS_BOOTM_LEN=0x04000000 -CONFIG_SYS_SPL_MALLOC_START=0x80400000 +CONFIG_SYS_SPL_MALLOC=y +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80400000 CONFIG_SYS_SPL_MALLOC_SIZE=0x00100000 CONFIG_SPL_STACK=0x80600000 CONFIG_SYS_SDRAM_BASE=0x80000000 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80600000 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80500000 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_PHY_MARVELL=y +CONFIG_RGMII=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_STARFIVE=y CONFIG_DM_GPIO=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y +CONFIG_CMD_NET=y CONFIG_CMD_PING=y -CONFIG_CMD_TFTPPUT=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +CONFIG_DISPLAY_CPUINFO=y +CONFIG_DISPLAY_BOARDINFO=y +CONFIG_DISPLAY_BOARDINFO_LATE=y |