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| author | Minda Chen <minda.chen@starfivetech.com> | 2023-11-13 09:42:07 +0300 |
|---|---|---|
| committer | Minda Chen <minda.chen@starfivetech.com> | 2023-12-22 06:39:37 +0300 |
| commit | 4472e9c5c616781481f882ea1d36b408fc8eba6d (patch) | |
| tree | 3b3b0b0a885255b1aaf19a9094b5a2528952092b | |
| parent | b7cc16149a59929b51771c9bab6c14547a43e5e3 (diff) | |
| download | u-boot-4472e9c5c616781481f882ea1d36b408fc8eba6d.tar.xz | |
spl: set rtos ram base (0x40400000 -> 0x6e800000)
set rtos ram base and move to running address.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
| -rw-r--r-- | board/starfive/visionfive2/Kconfig | 6 | ||||
| -rw-r--r-- | board/starfive/visionfive2/spl.c | 8 | ||||
| -rw-r--r-- | include/configs/starfive-visionfive2.h | 2 |
3 files changed, 15 insertions, 1 deletions
diff --git a/board/starfive/visionfive2/Kconfig b/board/starfive/visionfive2/Kconfig index 28bde2a09b..1b0282bc12 100644 --- a/board/starfive/visionfive2/Kconfig +++ b/board/starfive/visionfive2/Kconfig @@ -29,6 +29,12 @@ config SPL_TEXT_BASE config SPL_OPENSBI_LOAD_ADDR default 0x80000000 +config RTOS_RAM_BASE + default 0x6e800000 + +config RTOS_IMAGE_OFFSET + default 0x400000 + config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select STARFIVE_JH7110 diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c index 9373017ced..58e1e175e8 100644 --- a/board/starfive/visionfive2/spl.c +++ b/board/starfive/visionfive2/spl.c @@ -199,4 +199,10 @@ int board_fit_config_name_match(const char *name) } #endif - +void spl_perform_fixups(struct spl_image_info *spl_image) +{ + if (spl_image->size > CONFIG_RTOS_IMAGE_OFFSET) + memcpy((void *)CONFIG_RTOS_RAM_BASE, + (void *) (CONFIG_SPL_OPENSBI_LOAD_ADDR + CONFIG_RTOS_IMAGE_OFFSET), + spl_image->size - CONFIG_RTOS_IMAGE_OFFSET); +} diff --git a/include/configs/starfive-visionfive2.h b/include/configs/starfive-visionfive2.h index 37a51004ca..50ee1d4c55 100644 --- a/include/configs/starfive-visionfive2.h +++ b/include/configs/starfive-visionfive2.h @@ -23,6 +23,8 @@ #define CONFIG_SPL_STACK (0x08000000 + 0x00180000 - \ GENERATED_GBL_DATA_SIZE) #define STARFIVE_SPL_BOOT_LOAD_ADDR 0x60000000 +#define CONFIG_RTOS_RAM_BASE 0x6e800000 +#define CONFIG_RTOS_IMAGE_OFFSET 0x400000 #endif #define CONFIG_SYS_BOOTM_LEN SZ_64M |