diff options
| author | Minda Chen <minda.chen@starfivetech.com> | 2023-11-10 04:26:19 +0300 |
|---|---|---|
| committer | Minda Chen <minda.chen@starfivetech.com> | 2023-12-22 06:39:37 +0300 |
| commit | b7cc16149a59929b51771c9bab6c14547a43e5e3 (patch) | |
| tree | 57b063edc39a298f37e6df068e6b3be1c555b112 | |
| parent | 8c7b3f31fb546f829bbce9ee52435342314fabbf (diff) | |
| download | u-boot-b7cc16149a59929b51771c9bab6c14547a43e5e3.tar.xz | |
spl: enable uart1 for RT-thread using
Set clock and uart1 pin (pin 43 and pin 45) in spl
stage, used as RT-thread console.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
| -rw-r--r-- | arch/riscv/include/asm/arch-jh7110/jh7110-regs.h | 5 | ||||
| -rw-r--r-- | board/starfive/visionfive2/spl.c | 13 |
2 files changed, 17 insertions, 1 deletions
diff --git a/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h b/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h index 156709e6ae..fac53f3edd 100644 --- a/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h +++ b/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h @@ -114,5 +114,8 @@ #define CLK_QSPI_REF_SW_SHIFT 24 #define CLK_QSPI_REF_SW_MASK 0x1000000U -#endif /* __STARFIVE_JH7110_REGS_H */ +#define CLK_UART1_APB_OFFSET 0x24c +#define CLK_UART1_CORE_OFFSET 0x250 +#define CLK_RSTN_3_OFFSET 0x300 +#endif /* __STARFIVE_JH7110_REGS_H */ diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c index 2149fc519f..9373017ced 100644 --- a/board/starfive/visionfive2/spl.c +++ b/board/starfive/visionfive2/spl.c @@ -117,6 +117,19 @@ void board_init_f(ulong dummy) SYS_IOMUX_DOEN(6, HIGH); SYS_IOMUX_DIN(6, 14); + /* uart1 clock */ + setbits_le32(SYS_CRG_BASE + CLK_UART1_APB_OFFSET, BIT(31)); + setbits_le32(SYS_CRG_BASE + CLK_UART1_CORE_OFFSET, BIT(31)); + clrsetbits_le32(SYS_CRG_BASE + CLK_RSTN_3_OFFSET, BIT(21) | BIT(22), 0); + + /*uart1 tx*/ + SYS_IOMUX_DOEN(43, LOW); + SYS_IOMUX_DOUT(43, 0x44); + SYS_IOMUX_SET_DS(43, 3); + /*uart1 rx*/ + SYS_IOMUX_DOEN(45, HIGH); + SYS_IOMUX_DIN(45, 55); + /*jtag*/ SYS_IOMUX_DOEN(36, HIGH); SYS_IOMUX_DIN(36, 4); |