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authorSamin Guo <samin.guo@starfivetech.com>2023-04-03 06:26:35 +0300
committerSamin Guo <samin.guo@starfivetech.com>2023-04-03 06:26:35 +0300
commit0c7da4bebe1889ca2b802e0577a1e8cd816a8d4d (patch)
treefbe2e4578efd01b99b37525000be05ff7261acb2 /board
parentbd7c43e2d46699d79c290990b3c1fbec06cb0ea5 (diff)
downloadu-boot-0c7da4bebe1889ca2b802e0577a1e8cd816a8d4d.tar.xz
board: starfive: jh7110-evb: remove l2 pretcher in borad cfg
It should be configured in L2. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
Diffstat (limited to 'board')
-rw-r--r--board/starfive/evb/starfive_evb.c22
1 files changed, 0 insertions, 22 deletions
diff --git a/board/starfive/evb/starfive_evb.c b/board/starfive/evb/starfive_evb.c
index dc02aad206..97162aafe2 100644
--- a/board/starfive/evb/starfive_evb.c
+++ b/board/starfive/evb/starfive_evb.c
@@ -234,32 +234,10 @@ static void get_cpu_voltage_type(struct udevice *dev)
}
#endif
-/*enable U74-mc hart1~hart4 prefetcher*/
-static void enable_prefetcher(void)
-{
- u32 hart;
- u32 *reg;
-#define L2_PREFETCHER_BASE_ADDR 0x2030000
-#define L2_PREFETCHER_OFFSET 0x2000
-
- /*hart1~hart4*/
- for (hart = 1; hart < 5; hart++) {
- reg = (u32 *)((u64)(L2_PREFETCHER_BASE_ADDR
- + hart*L2_PREFETCHER_OFFSET));
-
- mb(); /* memory barrier */
- setbits_le32(reg, 0x1);
- mb(); /* memory barrier */
- }
-}
-
int board_init(void)
{
enable_caches();
- /*enable hart1-hart4 prefetcher*/
- enable_prefetcher();
-
jh7110_timer_init();
jh7110_usb_init(true);