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authorMason Huo <mason.huo@starfivetech.com>2023-04-07 04:34:08 +0300
committerMason Huo <mason.huo@starfivetech.com>2023-04-07 05:30:39 +0300
commitfcbb415e06b7fa8c8f525e4b07eb050daf8eb292 (patch)
tree4a48387659e47340760bc43697bd881fd2c50d91 /board
parentbd7c43e2d46699d79c290990b3c1fbec06cb0ea5 (diff)
downloadu-boot-fcbb415e06b7fa8c8f525e4b07eb050daf8eb292.tar.xz
board: starfive: jh7110: Modify cpu voltage set commands
Update the cpu voltage set commands per binning information from OTP. Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
Diffstat (limited to 'board')
-rw-r--r--board/starfive/evb/starfive_evb.c18
1 files changed, 11 insertions, 7 deletions
diff --git a/board/starfive/evb/starfive_evb.c b/board/starfive/evb/starfive_evb.c
index dc02aad206..e2e1e9b8a7 100644
--- a/board/starfive/evb/starfive_evb.c
+++ b/board/starfive/evb/starfive_evb.c
@@ -27,12 +27,14 @@ enum chip_type_t {
};
enum cpu_voltage_type_t {
- CPU_VOL_1020 = 0x0e,
- CPU_VOL_1040 = 0xff,
- CPU_VOL_1060 = 0xf0,
- CPU_VOL_1080 = 0xf1,
- CPU_VOL_1100 = 0xf2,
+ CPU_VOL_1020 = 0xef0,
+ CPU_VOL_1040 = 0xfff,
+ CPU_VOL_1060 = 0xff0,
+ CPU_VOL_1080 = 0xfe0,
+ CPU_VOL_1100 = 0xf80,
+ CPU_VOL_1120 = 0xf00,
};
+#define CPU_VOL_MASK 0xfff
#define SYS_CLOCK_ENABLE(clk) \
setbits_le32(SYS_CRG_BASE + clk, CLK_ENABLE_MASK)
@@ -212,8 +214,10 @@ static void get_cpu_voltage_type(struct udevice *dev)
if (ret != sizeof(buf))
printf("%s: error reading CPU vol from OTP\n", __func__);
else {
- buf = 0x0e;
- switch ((buf & 0xff)) {
+ switch ((buf & CPU_VOL_MASK)) {
+ case CPU_VOL_1120:
+ env_set("cpu_max_vol", "1120000");
+ break;
case CPU_VOL_1100:
env_set("cpu_max_vol", "1100000");
break;