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-rw-r--r--doc/develop/uefi/uefi.rst6
-rw-r--r--drivers/mtd/spi/Kconfig6
-rw-r--r--drivers/mtd/spi/spi-nor-ids.c5
-rw-r--r--drivers/spi/cadence_qspi_apb.c17
-rw-r--r--drivers/sysreset/sysreset_watchdog.c13
-rw-r--r--include/efi.h2
-rw-r--r--include/tee.h1
-rw-r--r--lib/aes/aes-encrypt.c3
-rw-r--r--lib/ecdsa/ecdsa-libcrypto.c2
-rw-r--r--lib/efi_loader/efi_variable_tee.c16
-rw-r--r--lib/rsa/rsa-sign.c2
-rw-r--r--tools/kwbimage.c2
12 files changed, 51 insertions, 24 deletions
diff --git a/doc/develop/uefi/uefi.rst b/doc/develop/uefi/uefi.rst
index a3e2656ab8..43fb10f797 100644
--- a/doc/develop/uefi/uefi.rst
+++ b/doc/develop/uefi/uefi.rst
@@ -248,9 +248,9 @@ OP-TEE Build instructions
$ export ARCH=arm
$ CROSS_COMPILE32=arm-linux-gnueabihf- make -j32 CFG_ARM64_core=y \
PLATFORM=<myboard> CFG_STMM_PATH=BL32_AP_MM.fd CFG_RPMB_FS=y \
- CFG_RPMB_FS_DEV_ID=0 CFG_CORE_HEAP_SIZE=524288 CFG_RPMB_WRITE_KEY=1 \
- CFG_CORE_HEAP_SIZE=524288 CFG_CORE_DYN_SHM=y CFG_RPMB_TESTKEY=y \
- CFG_REE_FS=n CFG_CORE_ARM64_PA_BITS=48 CFG_TEE_CORE_LOG_LEVEL=1 \
+ CFG_RPMB_FS_DEV_ID=0 CFG_CORE_HEAP_SIZE=524288 CFG_RPMB_WRITE_KEY=y \
+ CFG_CORE_DYN_SHM=y CFG_RPMB_TESTKEY=y CFG_REE_FS=n \
+ CFG_CORE_ARM64_PA_BITS=48 CFG_TEE_CORE_LOG_LEVEL=1 \
CFG_TEE_TA_LOG_LEVEL=1 CFG_SCTLR_ALIGNMENT_CHECK=n
U-Boot Build instructions
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index 408a53f861..2f56d46a38 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -129,12 +129,6 @@ config SPI_FLASH_UNLOCK_ALL
For legacy reasons, this option default to y. But if you intend to
actually use the software protection bits you should say n here.
-config SF_DUAL_FLASH
- bool "SPI DUAL flash memory support"
- help
- Enable this option to support two flash memories connected to a single
- controller. Currently Xilinx Zynq qspi supports this.
-
config SPI_FLASH_ATMEL
bool "Atmel SPI flash support"
help
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 3ae7bb1ed7..b551ebd75e 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -355,6 +355,11 @@ const struct flash_info spi_nor_ids[] = {
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
},
+ {
+ INFO("w25q01jv", 0xef4021, 0, 64 * 1024, 2048,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+ },
{ INFO("w25q80", 0xef5014, 0, 64 * 1024, 16, SECT_4K) },
{ INFO("w25q80bl", 0xef4014, 0, 64 * 1024, 16, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO("w25q16cl", 0xef4015, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index 429ee335db..2cdf4c9c9f 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -858,6 +858,14 @@ cadence_qspi_apb_indirect_read_execute(struct cadence_spi_plat *plat,
writel(CQSPI_REG_INDIRECTRD_DONE,
plat->regbase + CQSPI_REG_INDIRECTRD);
+ /* Check indirect done status */
+ ret = wait_for_bit_le32(plat->regbase + CQSPI_REG_INDIRECTRD,
+ CQSPI_REG_INDIRECTRD_DONE, 0, 10, 0);
+ if (ret) {
+ printf("Indirect read clear completion error (%i)\n", ret);
+ goto failrd;
+ }
+
return 0;
failrd:
@@ -1012,6 +1020,15 @@ cadence_qspi_apb_indirect_write_execute(struct cadence_spi_plat *plat,
/* Clear indirect completion status */
writel(CQSPI_REG_INDIRECTWR_DONE,
plat->regbase + CQSPI_REG_INDIRECTWR);
+
+ /* Check indirect done status */
+ ret = wait_for_bit_le32(plat->regbase + CQSPI_REG_INDIRECTWR,
+ CQSPI_REG_INDIRECTWR_DONE, 0, 10, 0);
+ if (ret) {
+ printf("Indirect write clear completion error (%i)\n", ret);
+ goto failwr;
+ }
+
if (bounce_buf)
free(bounce_buf);
return 0;
diff --git a/drivers/sysreset/sysreset_watchdog.c b/drivers/sysreset/sysreset_watchdog.c
index 35efcac59d..8a659ee9b9 100644
--- a/drivers/sysreset/sysreset_watchdog.c
+++ b/drivers/sysreset/sysreset_watchdog.c
@@ -20,9 +20,16 @@ static int wdt_reboot_request(struct udevice *dev, enum sysreset_t type)
struct wdt_reboot_plat *plat = dev_get_plat(dev);
int ret;
- ret = wdt_expire_now(plat->wdt, 0);
- if (ret)
- return ret;
+ switch (type) {
+ case SYSRESET_COLD:
+ case SYSRESET_WARM:
+ ret = wdt_expire_now(plat->wdt, 0);
+ if (ret)
+ return ret;
+ break;
+ default:
+ return -ENOSYS;
+ }
return -EINPROGRESS;
}
diff --git a/include/efi.h b/include/efi.h
index 0ec5913ddd..1432038838 100644
--- a/include/efi.h
+++ b/include/efi.h
@@ -321,7 +321,7 @@ struct efi_info_hdr {
* struct efi_entry_hdr - Header for a table entry
*
* @type: enum eft_entry_t
- * @size size of entry bytes excluding header and padding
+ * @size: size of entry bytes excluding header and padding
* @addr: address of this entry (0 if it follows the header )
* @link: size of entry including header and padding
* @spare1: Spare space for expansion
diff --git a/include/tee.h b/include/tee.h
index 44e9cd4321..087810bd12 100644
--- a/include/tee.h
+++ b/include/tee.h
@@ -39,6 +39,7 @@
#define TEE_SUCCESS 0x00000000
#define TEE_ERROR_STORAGE_NOT_AVAILABLE 0xf0100003
#define TEE_ERROR_GENERIC 0xffff0000
+#define TEE_ERROR_EXCESS_DATA 0xffff0004
#define TEE_ERROR_BAD_PARAMETERS 0xffff0006
#define TEE_ERROR_ITEM_NOT_FOUND 0xffff0008
#define TEE_ERROR_NOT_IMPLEMENTED 0xffff0009
diff --git a/lib/aes/aes-encrypt.c b/lib/aes/aes-encrypt.c
index a6d1720f30..e74e35eaa2 100644
--- a/lib/aes/aes-encrypt.c
+++ b/lib/aes/aes-encrypt.c
@@ -2,6 +2,9 @@
/*
* Copyright (c) 2019,Softathome
*/
+
+#define OPENSSL_API_COMPAT 0x10101000L
+
#include "mkimage.h"
#include <stdio.h>
#include <string.h>
diff --git a/lib/ecdsa/ecdsa-libcrypto.c b/lib/ecdsa/ecdsa-libcrypto.c
index 1757a14562..ae6dfa0ba9 100644
--- a/lib/ecdsa/ecdsa-libcrypto.c
+++ b/lib/ecdsa/ecdsa-libcrypto.c
@@ -18,6 +18,8 @@
* Copyright (c) 2020,2021, Alexandru Gagniuc <mr.nuke.me@gmail.com>
*/
+#define OPENSSL_API_COMPAT 0x10101000L
+
#include <u-boot/ecdsa.h>
#include <u-boot/fdt-libcrypto.h>
#include <openssl/ssl.h>
diff --git a/lib/efi_loader/efi_variable_tee.c b/lib/efi_loader/efi_variable_tee.c
index 281f886124..a2c65e3694 100644
--- a/lib/efi_loader/efi_variable_tee.c
+++ b/lib/efi_loader/efi_variable_tee.c
@@ -15,7 +15,6 @@
#include <malloc.h>
#include <mm_communication.h>
-#define OPTEE_PAGE_SIZE BIT(12)
extern struct efi_var_file __efi_runtime_data *efi_var_buf;
static efi_uintn_t max_buffer_size; /* comm + var + func + data */
static efi_uintn_t max_payload_size; /* func + data */
@@ -114,7 +113,11 @@ static efi_status_t optee_mm_communicate(void *comm_buf, ulong dsize)
rc = tee_invoke_func(conn.tee, &arg, 2, param);
tee_shm_free(shm);
tee_close_session(conn.tee, conn.session);
- if (rc || arg.ret != TEE_SUCCESS)
+ if (rc)
+ return EFI_DEVICE_ERROR;
+ if (arg.ret == TEE_ERROR_EXCESS_DATA)
+ log_err("Variable payload too large\n");
+ if (arg.ret != TEE_SUCCESS)
return EFI_DEVICE_ERROR;
switch (param[1].u.value.a) {
@@ -256,15 +259,6 @@ efi_status_t EFIAPI get_max_payload(efi_uintn_t *size)
}
*size = var_payload->size;
/*
- * Although the max payload is configurable on StMM, we only share a
- * single page from OP-TEE for the non-secure buffer used to communicate
- * with StMM. Since OP-TEE will reject to map anything bigger than that,
- * make sure we are in bounds.
- */
- if (*size > OPTEE_PAGE_SIZE)
- *size = OPTEE_PAGE_SIZE - MM_COMMUNICATE_HEADER_SIZE -
- MM_VARIABLE_COMMUNICATE_SIZE;
- /*
* There seems to be a bug in EDK2 miscalculating the boundaries and
* size checks, so deduct 2 more bytes to fulfill this requirement. Fix
* it up here to ensure backwards compatibility with older versions
diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index 0579e5294e..44f21416ce 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -3,6 +3,8 @@
* Copyright (c) 2013, Google Inc.
*/
+#define OPENSSL_API_COMPAT 0x10101000L
+
#include "mkimage.h"
#include <stdlib.h>
#include <stdio.h>
diff --git a/tools/kwbimage.c b/tools/kwbimage.c
index 875f636c7a..da8bfe0518 100644
--- a/tools/kwbimage.c
+++ b/tools/kwbimage.c
@@ -8,6 +8,8 @@
* <thomas.petazzoni@free-electrons.com>
*/
+#define OPENSSL_API_COMPAT 0x10101000L
+
#include "imagetool.h"
#include <limits.h>
#include <image.h>
generated by cgit v1.2.3 (git 2.39.0) at 2024-06-02 16:11:18 +0300