summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorPatrick Williams <patrick@stwcx.xyz>2015-10-16 15:47:31 +0300
committerPatrick Williams <patrick@stwcx.xyz>2015-10-16 15:47:31 +0300
commitd58aff8ae797bdc22687810048f1ad8d87ed34ee (patch)
tree62941fe33b102b352466a3ecb6d051d20f05dc6b
parentabab3a8fe366e6c8678c1b9148b3753dd2e45a6a (diff)
parentd819b470e093a74dfaed9024f242688eeaff236e (diff)
downloadlinux-d58aff8ae797bdc22687810048f1ad8d87ed34ee.tar.xz
Merge pull request #3 from jk-ozlabs/openbmc
Kernel fixes for openbmc
-rw-r--r--arch/arm/configs/aspeed_defconfig2
-rw-r--r--arch/arm/mach-aspeed/aspeed.c10
2 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/configs/aspeed_defconfig b/arch/arm/configs/aspeed_defconfig
index dfd5707edcc0..fa8e8a13a95c 100644
--- a/arch/arm/configs/aspeed_defconfig
+++ b/arch/arm/configs/aspeed_defconfig
@@ -151,7 +151,7 @@ CONFIG_USB_STORAGE=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_GADGET=y
-CONFIG_USB_G_SERIAL=m
+CONFIG_USB_G_SERIAL=y
CONFIG_MMC=y
CONFIG_MMC_SPI=y
CONFIG_NEW_LEDS=y
diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
index 64d379a90a41..9d106b857fbd 100644
--- a/arch/arm/mach-aspeed/aspeed.c
+++ b/arch/arm/mach-aspeed/aspeed.c
@@ -128,6 +128,8 @@ static void udbg_uart_putc(char c)
static void __init aspeed_init_early(void)
{
+ u32 reg;
+
// XXX UART stuff to fix to pinmux & co
printk("UART IO MUX...\n");
writel(0x02010023, AST_IO(AST_BASE_LPC | 0x9c));
@@ -137,6 +139,14 @@ static void __init aspeed_init_early(void)
writel(0xcb000000, AST_IO(AST_BASE_SCU | 0x80));
writel(0x00fff0c0, AST_IO(AST_BASE_SCU | 0x84));
writel(0x10CC5E80, AST_IO(AST_BASE_SCU | 0x0c));
+
+ /* We enable the UART clock divisor in the SCU's misc control
+ * register, as the baud rates in aspeed.dtb all assume that the
+ * divisor is active
+ */
+ reg = readl(AST_IO(AST_BASE_SCU | 0x2c));
+ writel(reg | 0x00001000, AST_IO(AST_BASE_SCU | 0x2c));
+
printk("DONE, MUX=%08x %08x\n", readl(AST_IO(AST_BASE_SCU | 0x80)),
readl(AST_IO(AST_BASE_SCU | 0x84)));
printk("CLOCK_CTRL=%08x\n", readl(AST_IO(AST_BASE_SCU)));