diff options
| author | Joel Stanley <joel@jms.id.au> | 2018-05-30 07:56:08 +0300 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2018-05-30 09:21:39 +0300 |
| commit | aca92be80c008bceeb6fb62fd1d450b5be5d0a4f (patch) | |
| tree | 0cccc045145f1bb519f1f62824dfeaa27a383ab3 | |
| parent | c8a956faa9ce098eebd7d15cac12bb32a60628a7 (diff) | |
| download | linux-dev-4.13.tar.xz | |
ARM: dts: aspeed: Fix hwrng register addressdev-4.13
The register address should be the full address of the rng, not the
offset from the start of the SCU.
OpenBMC-Staging-Count: 1
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
| -rw-r--r-- | arch/arm/boot/dts/aspeed-g4.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/aspeed-g5.dtsi | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 9354ac92d928..4b2f5fb8aaaf 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -122,9 +122,9 @@ }; }; - rng: hwrng@78 { + rng: hwrng@1e6e2078 { compatible = "timeriomem_rng"; - reg = <0x78 0x4>; + reg = <0x1e6e2078 0x4>; period = <1>; quality = <100>; }; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index f7c33fbcdaee..622e69ef6456 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -163,9 +163,9 @@ }; }; - rng: hwrng@78 { + rng: hwrng@1e6e2078 { compatible = "timeriomem_rng"; - reg = <0x78 0x4>; + reg = <0x1e6e2078 0x4>; period = <1>; quality = <100>; }; |