ARM: dts: aspeed-g5: Clean up sio registers

Remove the unnecessary reg property. Drop the 'rx' in the name, as this
refers to a quirk in the datasheet and is not useful.

Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>

1 files changed, 18 insertions, 19 deletions

diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index e9e039a6407c..7588a4c9643a 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -328,9 +328,8 @@
 						status = "disabled";
 					};
 
-					sio_scratch: scratch@f0 {
+					sio_regs: regs {
 						compatible = "aspeed,bmc-misc";
-						reg = <0xf0 0x10>;
 					};
 
 					mbox: mbox@180 {
@@ -1487,83 +1486,83 @@
 	};
 };
 
-&sio_scratch {
-	siorx_2b {
+&sio_regs {
+	sio_2b {
 		offset = <0xf0>;
 		bit-mask = <0xff>;
 		bit-shift = <24>;
 	};
-	siorx_2a {
+	sio_2a {
 		offset = <0xf0>;
 		bit-mask = <0xff>;
 		bit-shift = <16>;
 	};
-	siorx_29 {
+	sio_29 {
 		offset = <0xf0>;
 		bit-mask = <0xff>;
 		bit-shift = <8>;
 	};
-	siorx_28 {
+	sio_28 {
 		offset = <0xf0>;
 		bit-mask = <0xff>;
 		bit-shift = <0>;
 	};
-	siorx_2f {
+	sio_2f {
 		offset = <0xf4>;
 		bit-mask = <0xff>;
 		bit-shift = <24>;
 	};
-	siorx_2e {
+	sio_2e {
 		offset = <0xf4>;
 		bit-mask = <0xff>;
 		bit-shift = <16>;
 	};
-	siorx_2d {
+	sio_2d {
 		offset = <0xf4>;
 		bit-mask = <0xff>;
 		bit-shift = <8>;
 	};
-	siorx_2c {
+	sio_2c {
 		offset = <0xf4>;
 		bit-mask = <0xff>;
 		bit-shift = <0>;
 	};
-	siorx_23 {
+	sio_23 {
 		offset = <0xf8>;
 		bit-mask = <0xff>;
 		bit-shift = <24>;
 	};
-	siorx_22 {
+	sio_22 {
 		offset = <0xf8>;
 		bit-mask = <0xff>;
 		bit-shift = <16>;
 	};
-	siorx_21 {
+	sio_21 {
 		offset = <0xf8>;
 		bit-mask = <0xff>;
 		bit-shift = <8>;
 	};
-	siorx_20 {
+	sio_20 {
 		offset = <0xf8>;
 		bit-mask = <0xff>;
 		bit-shift = <0>;
 	};
-	siorx_27 {
+	sio_27 {
 		offset = <0xfc>;
 		bit-mask = <0xff>;
 		bit-shift = <24>;
 	};
-	siorx_26 {
+	sio_26 {
 		offset = <0xfc>;
 		bit-mask = <0xff>;
 		bit-shift = <16>;
 	};
-	siorx_25 {
+	sio_25 {
 		offset = <0xfc>;
 		bit-mask = <0xff>;
 		bit-shift = <8>;
 	};
-	siorx_24 {
+	sio_24 {
 		offset = <0xfc>;
 		bit-mask = <0xff>;
 		bit-shift = <0>;