diff options
author | Lei YU <mine260309@gmail.com> | 2018-05-09 12:35:58 +0300 |
---|---|---|
committer | Joel Stanley <joel@jms.id.au> | 2018-05-18 10:51:50 +0300 |
commit | 560f4314a01e130d04446ad41a3400f4b2fedd86 (patch) | |
tree | a0e36da36490fec9ebe21669679d5a8678e5526e | |
parent | d6c9237a17fdf53431546e93a1cbac332e004276 (diff) | |
download | linux-560f4314a01e130d04446ad41a3400f4b2fedd86.tar.xz |
clk: aspeed: Add 24MHz fixed clock
Add a 24MHz fixed clock that is provided by the input oscillator. This
clock will be used for certain devices, e.g. pwm.
OpenBMC-Staging-Count: 1
Signed-off-by: Lei YU <mine260309@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
-rw-r--r-- | drivers/clk/clk-aspeed.c | 8 | ||||
-rw-r--r-- | include/dt-bindings/clock/aspeed-clock.h | 1 |
2 files changed, 8 insertions, 1 deletions
diff --git a/drivers/clk/clk-aspeed.c b/drivers/clk/clk-aspeed.c index c5d2af2ace2e..ab67162573a3 100644 --- a/drivers/clk/clk-aspeed.c +++ b/drivers/clk/clk-aspeed.c @@ -23,7 +23,7 @@ #include <dt-bindings/clock/aspeed-clock.h> -#define ASPEED_NUM_CLKS 35 +#define ASPEED_NUM_CLKS 36 #define ASPEED_RESET2_OFFSET 32 @@ -517,6 +517,12 @@ static int aspeed_clk_probe(struct platform_device *pdev) return PTR_ERR(hw); aspeed_clk_data->hws[ASPEED_CLK_BCLK] = hw; + /* Fixed 24MHz clock */ + hw = clk_hw_register_fixed_rate(NULL, "fixed-24m", "clkin", 0, 24000000); + if (IS_ERR(hw)) + return PTR_ERR(hw); + aspeed_clk_data->hws[ASPEED_CLK_24M] = hw; + /* * TODO: There are a number of clocks that not included in this driver * as more information is required: diff --git a/include/dt-bindings/clock/aspeed-clock.h b/include/dt-bindings/clock/aspeed-clock.h index e983d177f7c7..9733c77cb2a0 100644 --- a/include/dt-bindings/clock/aspeed-clock.h +++ b/include/dt-bindings/clock/aspeed-clock.h @@ -37,6 +37,7 @@ #define ASPEED_CLK_MAC 32 #define ASPEED_CLK_BCLK 33 #define ASPEED_CLK_MPLL 34 +#define ASPEED_CLK_24M 35 #define ASPEED_RESET_XDMA 0 #define ASPEED_RESET_MCTP 1 |