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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2018-05-08 04:06:37 +0300
committerJoel Stanley <joel@jms.id.au>2018-05-11 13:48:09 +0300
commita5d232cd20cd64192c3c554b87b28f00771962f8 (patch)
tree94e61cd8e1cb7387519ca70e75825037bb1c43ca
parent9a050326828260251a075196c608e2f7a50e697e (diff)
downloadlinux-a5d232cd20cd64192c3c554b87b28f00771962f8.tar.xz
fsi/fsi-master-gpio: Sample input data on different clock phase
We currently sample the input data right after we toggle the clock low, then high. The slave establishes the data on the rising edge, so this is not ideal. We should sample it on the low phase instead. This currently works because we have an extra delay, but subsequent patches will remove it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
-rw-r--r--drivers/fsi/fsi-master-gpio.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/fsi/fsi-master-gpio.c b/drivers/fsi/fsi-master-gpio.c
index 4295a46780cb..d6508bbad1fb 100644
--- a/drivers/fsi/fsi-master-gpio.c
+++ b/drivers/fsi/fsi-master-gpio.c
@@ -86,12 +86,15 @@ static void clock_toggle(struct fsi_master_gpio *master, int count)
}
}
-static int sda_in(struct fsi_master_gpio *master)
+static int sda_clock_in(struct fsi_master_gpio *master)
{
int in;
ndelay(FSI_GPIO_STD_DLY);
+ gpiod_set_value(master->gpio_clk, 0);
in = gpiod_get_value(master->gpio_data);
+ ndelay(FSI_GPIO_STD_DLY);
+ gpiod_set_value(master->gpio_clk, 1);
return in ? 1 : 0;
}
@@ -126,8 +129,7 @@ static void serial_in(struct fsi_master_gpio *master, struct fsi_gpio_msg *msg,
set_sda_input(master);
for (bit = 0; bit < num_bits; bit++) {
- clock_toggle(master, 1);
- in_bit = sda_in(master);
+ in_bit = sda_clock_in(master);
msg->msg <<= 1;
msg->msg |= ~in_bit & 0x1; /* Data is active low */
}