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| author | Joel Stanley <joel@jms.id.au> | 2018-04-19 07:20:02 +0300 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2018-04-20 09:40:28 +0300 |
| commit | aaa32ac5520b9b28d875cc3e233492c463d6e072 (patch) | |
| tree | 00e127052630f62d6c43971034c32bbe341118e7 | |
| parent | 84532683d1b8b2c570a9e60c511c96271a9f3b56 (diff) | |
| download | linux-aaa32ac5520b9b28d875cc3e233492c463d6e072.tar.xz | |
ARM: dts: aspeed-g5: Add resets and clocks to GFX node
The ast2500 has a reset for the CRT device that must be deasserted
before it can be used. Similarly it has a clock gate for a clock called
D1CLK that must be set to running.
OpenBMC-Staging-Count: 1
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
| -rw-r--r-- | arch/arm/boot/dts/aspeed-g5.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 25a88dd44d91..4ca4bc463347 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -175,6 +175,10 @@ compatible = "aspeed,ast2500-gfx", "syscon"; reg = <0x1e6e6000 0x1000>; reg-io-width = <4>; + clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; + resets = <&syscon ASPEED_RESET_CRT1>; + status = "disabled"; + interrupts = <0x19>; }; adc: adc@1e6e9000 { |