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| author | Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> | 2018-04-26 01:33:21 +0300 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2018-04-26 05:14:59 +0300 |
| commit | e18cfdc2840ac60e6b1d0b117678306e3582d8ed (patch) | |
| tree | 1277eca9f3abc869742846b6c62bf1a3a20b65ca | |
| parent | 5b5a9c2d51eda4279915d72cda387dd6edfd00df (diff) | |
| download | linux-e18cfdc2840ac60e6b1d0b117678306e3582d8ed.tar.xz | |
clk: aspeed: Fix reset assert logic
This commit fixes a bug in aspeed_reset_assert() which determines
the second reset register using condition.
OpenBMC-Staging-Count: 1
Fixes: 9e3efb97c78f ("clk: aspeed: Support second reset register")
Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
| -rw-r--r-- | drivers/clk/clk-aspeed.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/clk-aspeed.c b/drivers/clk/clk-aspeed.c index de8e1dba6eec..c5d2af2ace2e 100644 --- a/drivers/clk/clk-aspeed.c +++ b/drivers/clk/clk-aspeed.c @@ -349,7 +349,7 @@ static int aspeed_reset_assert(struct reset_controller_dev *rcdev, u32 reg = ASPEED_RESET_CTRL; u32 bit = aspeed_resets[id]; - if (bit >= ASPEED_RESET_CTRL2) { + if (bit >= ASPEED_RESET2_OFFSET) { bit -= ASPEED_RESET2_OFFSET; reg = ASPEED_RESET_CTRL2; } |