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| author | KenChenIEC <chen.kenyy@inventec.com> | 2017-04-27 07:02:14 +0300 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2017-04-27 09:22:44 +0300 |
| commit | 65effbd2d0c36aab06555e59add12b498c8a1aba (patch) | |
| tree | e00309b4849eb168f7c32a1b7b37a4430cebb662 | |
| parent | b6e95d08c1fd39409fe0d127007a4166024fc8e7 (diff) | |
| download | linux-65effbd2d0c36aab06555e59add12b498c8a1aba.tar.xz | |
ARM: dts: aspeed: Modify Laanyang BMC device tree
Modify Lanyang dts and add lanyang initial in aspeed.c
Signed-off-by: Ken Chen <chen.kenyy@inventec.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
[Fixed dts-v1 annotation and removed empty gpio node]
Signed-off-by: Joel Stanley <joel@jms.id.au>
| -rw-r--r-- | arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dts | 13 | ||||
| -rw-r--r-- | arch/arm/mach-aspeed/aspeed.c | 17 |
2 files changed, 21 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dts b/arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dts index 176e4b449339..2900fa02e448 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dts @@ -301,19 +301,14 @@ status = "disabled"; }; -&gpio { - line_apss_reset { - gpio-hog; - gpios = <ASPEED_GPIO(E, 4) GPIO_ACTIVE_HIGH>; - output-high; - line-name = "BMC_APSS_RESET_N"; - }; -}; - &vuart { status = "okay"; }; +&gfx { + status = "okay"; +}; + &pinctrl { aspeed,external-nodes = <&gfx &lhc>; }; diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c index a7b03a065eb7..0717181cc890 100644 --- a/arch/arm/mach-aspeed/aspeed.c +++ b/arch/arm/mach-aspeed/aspeed.c @@ -238,6 +238,21 @@ static void __init do_romulus_setup(void) writel(reg & ~BIT(4), AST_IO(AST_BASE_LPC | 0x98)); } +static void __init do_lanyang_setup(void) +{ + unsigned long reg; + + do_common_setup(); + + /* Disable default behavior of UART1 being held in reset by LPCRST#. + * By releasing UART1 from being controlled by LPC reset, it becomes + * immediately available regardless of the host being up. + */ + reg = readl(AST_IO(AST_BASE_LPC | 0x98)); + /* Clear "Enable UART1 reset source from LPC" */ + writel(reg & ~BIT(4), AST_IO(AST_BASE_LPC | 0x98)); +} + #define SCU_PASSWORD 0x1688A8A8 static void __init aspeed_init_early(void) @@ -275,6 +290,8 @@ static void __init aspeed_init_early(void) do_witherspoon_setup(); if (of_machine_is_compatible("ibm,romulus-bmc")) do_romulus_setup(); + if (of_machine_is_compatible("inventec,lanyang-bmc")) + do_lanyang_setup(); } static void __init aspeed_map_io(void) |