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| author | Joel Stanley <joel@jms.id.au> | 2017-05-01 10:51:39 +0300 |
|---|---|---|
| committer | Patrick Williams <patrick@stwcx.xyz> | 2017-05-01 21:53:51 +0300 |
| commit | 912e689d0b12445025dab6053825c81e7777bcd3 (patch) | |
| tree | 5dcb63827972bca19296ea6e580058d5184dd64c | |
| parent | 8b5847cfa7d8ae5e306203fc01c3dde8c8d25649 (diff) | |
| download | linux-912e689d0b12445025dab6053825c81e7777bcd3.tar.xz | |
ARM: aspeed: witherspoon: Take UART1 out of reset
This is required so the UART can be used before booting the host.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
| -rw-r--r-- | arch/arm/mach-aspeed/aspeed.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c index 0717181cc890..0d1dded5d91b 100644 --- a/arch/arm/mach-aspeed/aspeed.c +++ b/arch/arm/mach-aspeed/aspeed.c @@ -197,6 +197,8 @@ static void __init do_zaius_setup(void) static void __init do_witherspoon_setup(void) { + int reg; + do_common_setup(); /* Setup PNOR address mapping for 64M flash @@ -216,6 +218,14 @@ static void __init do_witherspoon_setup(void) /* Set SPI1 CE0 decoding window to 0x30000000 */ writel(0x68600000, AST_IO(AST_BASE_SPI | 0x30)); + + /* Disable default behavior of UART1 being held in reset by LPCRST#. + * By releasing UART1 from being controlled by LPC reset, it becomes + * immediately available regardless of the host being up. + */ + reg = readl(AST_IO(AST_BASE_LPC | 0x98)); + /* Clear "Enable UART1 reset source from LPC" */ + writel(reg & ~BIT(4), AST_IO(AST_BASE_LPC | 0x98)); } static void __init do_romulus_setup(void) |