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author | Biju Das <biju.das@bp.renesas.com> | 2018-09-11 13:12:43 +0300 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2018-09-17 11:30:37 +0300 |
commit | 841e37a5cad3976a15b531e512076a05b6045b4b (patch) | |
tree | 28d26150c9541fc7b02a3bd15afa07c3bab3b9a8 | |
parent | 08ea4a3004da9dfbf361f6791934af58a35ec350 (diff) | |
download | linux-841e37a5cad3976a15b531e512076a05b6045b4b.tar.xz |
dt-bindings: power: rcar-sysc: Add r8a7744 power domain index macros
Add power domain indices for RZ/G1N (R8A7744) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | include/dt-bindings/power/r8a7744-sysc.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/include/dt-bindings/power/r8a7744-sysc.h b/include/dt-bindings/power/r8a7744-sysc.h new file mode 100644 index 000000000000..8b6529778f98 --- /dev/null +++ b/include/dt-bindings/power/r8a7744-sysc.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright (C) 2018 Renesas Electronics Corp. + */ +#ifndef __DT_BINDINGS_POWER_R8A7744_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A7744_SYSC_H__ + +/* + * These power domain indices match the numbers of the interrupt bits + * representing the power areas in the various Interrupt Registers + * (e.g. SYSCISR, Interrupt Status Register) + * + * Note that RZ/G1N is identical to RZ/G2M w.r.t. power domains. + */ + +#define R8A7744_PD_CA15_CPU0 0 +#define R8A7744_PD_CA15_CPU1 1 +#define R8A7744_PD_CA15_SCU 12 +#define R8A7744_PD_SGX 20 + +/* Always-on power area */ +#define R8A7744_PD_ALWAYS_ON 32 + +#endif /* __DT_BINDINGS_POWER_R8A7744_SYSC_H__ */ |