diff options
author | Ramalingam C <ramalingam.c@intel.com> | 2018-01-18 08:48:08 +0300 |
---|---|---|
committer | Sean Paul <seanpaul@chromium.org> | 2018-01-19 01:56:02 +0300 |
commit | 49d85d034268ab9d9156ff6f81cc07d4caad03f6 (patch) | |
tree | 5f5e5ace2fdfd293c5ad30f013fb638d1c56a36c | |
parent | 24b42cbadb73e0b9ac67c2d619073b394bc146bd (diff) | |
download | linux-49d85d034268ab9d9156ff6f81cc07d4caad03f6.tar.xz |
drm/i915: Check for downstream topology errors
HDCP compliant Repeaters can support max of 127 devices and max
depth of 7 for downstream topology.
If these max limits are exceeded, repeater will set the
topology error flags MAX_CASCADE_EXCEEDED and/or MAX_DEVS_EXCEEDED
in Bstatus followed by asserting READY/CP_IRQ for HDCP transmitter.
This patch check for these error flags as soon as READY bit is asserted.
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
[seanpaul fixed checkpatch alignment issue]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1516254488-4971-5-git-send-email-ramalingam.c@intel.com
-rw-r--r-- | drivers/gpu/drm/i915/intel_hdcp.c | 6 | ||||
-rw-r--r-- | include/drm/drm_hdcp.h | 2 |
2 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c index b50c03a3bfe6..db9527173a1e 100644 --- a/drivers/gpu/drm/i915/intel_hdcp.c +++ b/drivers/gpu/drm/i915/intel_hdcp.c @@ -160,6 +160,12 @@ int intel_hdcp_auth_downstream(struct intel_digital_port *intel_dig_port, if (ret) return ret; + if (DRM_HDCP_MAX_DEVICE_EXCEEDED(bstatus[0]) || + DRM_HDCP_MAX_CASCADE_EXCEEDED(bstatus[1])) { + DRM_ERROR("Max Topology Limit Exceeded\n"); + return -EPERM; + } + /* If there are no downstream devices, we're all done. */ num_downstream = DRM_HDCP_NUM_DOWNSTREAM(bstatus[0]); if (num_downstream == 0) { diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h index 43f7bd902b41..562fa7df2637 100644 --- a/include/drm/drm_hdcp.h +++ b/include/drm/drm_hdcp.h @@ -20,6 +20,8 @@ #define DRM_HDCP_V_PRIME_PART_LEN 4 #define DRM_HDCP_V_PRIME_NUM_PARTS 5 #define DRM_HDCP_NUM_DOWNSTREAM(x) (x & 0x3f) +#define DRM_HDCP_MAX_CASCADE_EXCEEDED(x) (x & BIT(3)) +#define DRM_HDCP_MAX_DEVICE_EXCEEDED(x) (x & BIT(7)) /* Slave address for the HDCP registers in the receiver */ #define DRM_HDCP_DDC_ADDR 0x3A |