summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorRaju Rangoju <rajur@chelsio.com>2021-05-19 14:18:31 +0300
committerDavid S. Miller <davem@davemloft.net>2021-05-19 23:00:54 +0300
commit88c380df84fbd03f9b137c2b9d0a44b9f2f553b0 (patch)
tree8817007d844415597bac434ed655acae9f0ceb3e
parentbe338bdafaeb9268b43de481580458c29171a672 (diff)
downloadlinux-88c380df84fbd03f9b137c2b9d0a44b9f2f553b0.tar.xz
cxgb4: avoid accessing registers when clearing filters
Hardware register having the server TID base can contain invalid values when adapter is in bad state (for example, due to AER fatal error). Reading these invalid values in the register can lead to out-of-bound memory access. So, fix by using the saved server TID base when clearing filters. Fixes: b1a79360ee86 ("cxgb4: Delete all hash and TCAM filters before resource cleanup") Signed-off-by: Raju Rangoju <rajur@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c
index bc581b149b11..22c9ac922eba 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c
@@ -1042,7 +1042,7 @@ void clear_all_filters(struct adapter *adapter)
cxgb4_del_filter(dev, f->tid, &f->fs);
}
- sb = t4_read_reg(adapter, LE_DB_SRVR_START_INDEX_A);
+ sb = adapter->tids.stid_base;
for (i = 0; i < sb; i++) {
f = (struct filter_entry *)adapter->tids.tid_tab[i];