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authorShirish S <shirish.s@amd.com>2017-06-08 09:25:06 +0300
committerAlex Deucher <alexander.deucher@amd.com>2017-09-27 01:07:59 +0300
commitaed8b319180f18402ed90929f85e2b3e5b81e71d (patch)
tree145a65c20a3093be96e536d4868f7c3b7eca14cb
parent561f3a4db315d639b93adf86eedbb8405dd81fbe (diff)
downloadlinux-aed8b319180f18402ed90929f85e2b3e5b81e71d.tar.xz
drm/amd/display: remove get_position() of underlay
get_position() returns CRTC vertical/horizontal counters, hence it is not applicable for underlay which is plane and not attached to one crtc. This patch hence removes the callback from dce110_tg_v_funcs and hence fixes a bug in dc_debug.c where in get_position() for underlay pipe is called un-conditionally. Witout this patch get_position() is called in case one has to update underlay plane's data, since callback implmented with an ASSERT(), the old_surface_count and new_surface_count mismatches; causing only one plane update which is not right and also assert makes the rendering slow. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/display/dc/core/dc_debug.c9
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c9
2 files changed, 8 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_debug.c b/drivers/gpu/drm/amd/display/dc/core/dc_debug.c
index ad556e9b0754..9a5df3a848b5 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_debug.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_debug.c
@@ -297,11 +297,16 @@ void context_timing_trace(
struct dal_logger *logger = core_dc->ctx->logger;
int h_pos[MAX_PIPES], v_pos[MAX_PIPES];
struct crtc_position position;
+ unsigned int underlay_idx = core_dc->res_pool->underlay_pipe_index;
+
for (i = 0; i < core_dc->res_pool->pipe_count; i++) {
struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
-
- if (pipe_ctx->stream == NULL)
+ /* get_position() returns CRTC vertical/horizontal counter
+ * hence not applicable for underlay pipe
+ */
+ if (pipe_ctx->stream == NULL
+ || pipe_ctx->pipe_idx == underlay_idx)
continue;
pipe_ctx->tg->funcs->get_position(pipe_ctx->tg, &position);
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c
index 759c55bb4d15..93ca6ae48cb9 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c
@@ -570,13 +570,6 @@ static void dce110_timing_generator_v_set_early_control(
dm_write_reg(tg->ctx, address, regval);
}
-static void dce110_timing_generator_get_underlay_position(struct timing_generator *tg,
- struct crtc_position *position)
-{
- //Should never hit this case
- ASSERT(false);
-}
-
static uint32_t dce110_timing_generator_v_get_vblank_counter(struct timing_generator *tg)
{
uint32_t addr = mmCRTCV_STATUS_FRAME_COUNT;
@@ -652,7 +645,7 @@ static const struct timing_generator_funcs dce110_tg_v_funcs = {
.enable_crtc = dce110_timing_generator_v_enable_crtc,
.disable_crtc = dce110_timing_generator_v_disable_crtc,
.is_counter_moving = dce110_timing_generator_v_is_counter_moving,
- .get_position = dce110_timing_generator_get_underlay_position,
+ .get_position = NULL, /* Not to be implemented for underlay*/
.get_frame_count = dce110_timing_generator_v_get_vblank_counter,
.set_early_control = dce110_timing_generator_v_set_early_control,
.wait_for_state = dce110_timing_generator_v_wait_for_state,