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authorJiri Kosina <jkosina@suse.cz>2020-11-03 13:30:49 +0300
committerJiri Kosina <jkosina@suse.cz>2020-11-03 13:30:49 +0300
commit907286d1420d28bead47da37b9a081377c070322 (patch)
tree6bdc84024634aa75406c211a7cba8efe2cfaecec /Documentation/hid
parent4b393f0f76c8e3ce80b3bd524dc40bd674a29101 (diff)
downloadlinux-907286d1420d28bead47da37b9a081377c070322.tar.xz
HID: SFH: Add documentation
Add Documentation/hid/amd-sfh-hid.rst file which was by mistake dropped by me when applying the series. Fixes: 302f0dad8c97a11ab ("SFH: Add maintainers and documentation for AMD SFH based on HID framework") Reported-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Originally-by: Sandeep Singh <Sandeep.Singh@amd.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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+.. SPDX-License-Identifier: GPL-2.0
+
+
+AMD Sensor Fusion Hub
+=====================
+AMD Sensor Fusion Hub (SFH) is part of an SOC starting from Ryzen based platforms.
+The solution is working well on several OEM products. AMD SFH uses HID over PCIe bus.
+In terms of architecture it resembles ISH, however the major difference is all
+the HID reports are generated as part of the kernel driver.
+
+1. Block Diagram
+================
+
+::
+
+ ---------------------------------
+ | HID User Space Applications |
+ - -------------------------------
+
+ ---------------------------------------------
+ ---------------------------------
+ | HID Core |
+ ---------------------------------
+
+ ---------------------------------
+ | AMD HID Transport |
+ ---------------------------------
+
+ --------------------------------
+ | AMD HID Client |
+ | with HID Report Generator|
+ --------------------------------
+
+ --------------------------------
+ | AMD MP2 PCIe Driver |
+ --------------------------------
+ OS
+ ---------------------------------------------
+ Hardware + Firmware
+ --------------------------------
+ | SFH MP2 Processor |
+ --------------------------------
+
+
+AMD HID Transport Layer
+-----------------------
+AMD SFH transport is also implemented as a bus. Each client application executing in the AMD MP2 is
+registered as a device on this bus. Here: MP2 which is an ARM core connected to x86 for processing
+sensor data. The layer, which binds each device (AMD SFH HID driver) identifies the device type and
+registers with the hid core. Transport layer attach a constant "struct hid_ll_driver" object with
+each device. Once a device is registered with HID core, the callbacks provided via this struct are
+used by HID core to communicate with the device. AMD HID Transport layer implements the synchronous calls.
+
+AMD HID Client Layer
+--------------------
+This layer is responsible to implement HID request and descriptors. As firmware is OS agnostic, HID
+client layer fills the HID request structure and descriptors. HID client layer is complex as it is
+interface between MP2 PCIe layer and HID. HID client layer initialized the MP2 PCIe layer and holds
+the instance of MP2 layer. It identifies the number of sensors connected using MP2-PCIe layer. Base
+on that allocates the DRAM address for each and every sensor and pass it to MP2-PCIe driver.On
+enumeration of each the sensor, client layer fills the HID Descriptor structure and HID input repor
+structure. HID Feature report structure is optional. The report descriptor structure varies from
+sensor to sensor.
+
+AMD MP2 PCIe layer
+------------------
+MP2 PCIe Layer is responsible for making all transactions with the firmware over PCIe.
+The connection establishment between firmware and PCIe happens here.
+
+The communication between X86 and MP2 is split into three parts.
+1. Command transfer via the C2P mailbox registers.
+2. Data transfer via DRAM.
+3. Supported sensor info via P2C registers.
+
+Commands are sent to MP2 using C2P Mailbox registers. Writing into C2P Message registers generate
+interrupt to MP2. The client layer allocates the physical memory and the same is sent to MP2 via
+the PCI layer. MP2 firmware writes the command output to the access DRAM memory which the client
+layer has allocated. Firmware always writes minimum of 32 bytes into DRAM. So as a protocol driver
+shall allocate minimum of 32 bytes DRAM space.
+
+Enumeration and Probing flow
+----------------------------
+::
+
+ HID AMD AMD AMD -PCIe MP2
+ Core Transport Client layer layer FW
+ | | | | |
+ | | | on Boot Driver Loaded |
+ | | | | |
+ | | | MP2-PCIe Int |
+ | | | | |
+ | | |---Get Number of sensors-> | |
+ | | | Read P2C |
+ | | | Register |
+ | | | | |
+ | | | Loop(for No of Sensors) | |
+ | | |----------------------| | |
+ | | | Create HID Descriptor| | |
+ | | | Create Input report | | |
+ | | | Descriptor Map | | |
+ | | | the MP2 FW Index to | | |
+ | | | HID Index | | |
+ | | | Allocate the DRAM | Enable |
+ | | | address | Sensors |
+ | | |----------------------| | |
+ | | HID transport| | Enable |
+ | |<--Probe------| |---Sensor CMD--> |
+ | | Create the | | |
+ | | HID device | | |
+ | | (MFD) | | |
+ | | by Populating| | |
+ | | the HID | | |
+ | | ll_driver | | |
+ | HID | | | |
+ | add | | | |
+ |Device | | | |
+ |<------------- | | | |
+
+
+Data Flow from Application to the AMD SFH Driver
+------------------------------------------------
+
+::
+
+ | | | | |
+ | | | | |
+ | | | | |
+ | | | | |
+ | | | | |
+ |HID_req | | | |
+ |get_report | | | |
+ |------------->| | | |
+ | | HID_get_input| | |
+ | | report | | |
+ | |------------->|------------------------| | |
+ | | | Read the DRAM data for| | |
+ | | | requested sensor and | | |
+ | | | create the HID input | | |
+ | | | report | | |
+ | | |------------------------| | |
+ | |Data received | | |
+ | | in HID report| | |
+ To |<-------------|<-------------| | |
+ Applications| | | | |
+ <-------| | | | |