diff options
author | Arnd Bergmann <arnd@arndb.de> | 2021-02-10 01:30:19 +0300 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2021-02-10 01:30:19 +0300 |
commit | 889231c6c80113ad0929eea01e8272048be38552 (patch) | |
tree | d23a424be5eaf704c676183870a33b4a1047b4f7 /arch/arm64/boot/dts/rockchip/rk3308.dtsi | |
parent | 243d3de3bd40379bbc63523f3e5638a1ad850345 (diff) | |
parent | 7582ad63c9bd09a8f0988c46074481ddd4f92e04 (diff) | |
download | linux-889231c6c80113ad0929eea01e8272048be38552.tar.xz |
Merge tag 'v5.12-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
New boards: Radxa Rock Pi E, NanoPi M4B
More fixed indices for mmc nodes; removal of obsolete amba bus nodes;
nand-flash-controller nodes for px30 and rk3308; rk3399 pcie ranges fix;
board-level fixes for Helios64, NanoPi and Rock960; more sound support
for rock64 and rockpro64 and cleanups to make dt-bindings happier.
* tag 'v5.12-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (24 commits)
arm64: dts: rockchip: more user friendly name of sound nodes
arm64: dts: rockchip: rename pinctrl nodename to gmac2io for nanopi-r2s board
arm64: dts: rockchip: assign a fixed index to mmc devices on rk3368 boards
arm64: dts: rockchip: assign a fixed index to mmc devices on rk3308 boards
arm64: dts: rockchip: assign a fixed index to mmc devices on px30 boards
arm64: dts: rockchip: cleanup cpu_thermal node of rk3399-rock960.dts
arm64: dts: rockchip: Remove bogus "amba" bus nodes
arm64: dts: rockchip: Light "sys" LED on NanoPi R2S
arm64: dts: rockchip: fix ranges property format for rk3399 pcie node
arm64: dts: rockchip: Rely on SoC external pull up on pmic-int-l on Helios64
arm64: dts: rockchip: Add NanoPi M4B board
arm64: dts: rockchip: Move ep-gpios property to nanopc-t4 from nanopi4
arm64: dts: rockchip: Add NFC node for PX30 SoC
arm64: dts: rockchip: Add NFC node for RK3308 SoC
arm64: dts: rockchip: rk3328: Add Radxa ROCK Pi E
dt-bindings: arm: rockchip: Add Radxa ROCK Pi E
arm64: dts: rockchip: rk3328: Add clock_in_out property to gmac2phy node
arm64: dts: rockchip: rename thermal subnodes for rk3399
arm64: dts: rockchip: rename thermal subnodes for rk3368
arm64: dts: rockchip: add SPDIF node for rk3399-rockpro64
...
Link: https://lore.kernel.org/r/12699743.uLZWGnKmhe@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3308.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3308.dtsi | 63 |
1 files changed, 37 insertions, 26 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index 2560b98771ca..3a035a189450 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -24,6 +24,9 @@ i2c1 = &i2c1; i2c2 = &i2c2; i2c3 = &i2c3; + mmc0 = &sdmmc; + mmc1 = &emmc; + mmc2 = &sdio; serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; @@ -513,33 +516,26 @@ status = "disabled"; }; - amba: bus { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; + dmac0: dma-controller@ff2c0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x0 0xff2c0000 0x0 0x4000>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; + arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC0>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + }; - dmac0: dma-controller@ff2c0000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff2c0000 0x0 0x4000>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC0>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - }; - - dmac1: dma-controller@ff2d0000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff2d0000 0x0 0x4000>; - interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC1>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - }; + dmac1: dma-controller@ff2d0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x0 0xff2d0000 0x0 0x4000>; + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; + arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC1>; + clock-names = "apb_pclk"; + #dma-cells = <1>; }; i2s_2ch_0: i2s@ff350000 { @@ -629,6 +625,21 @@ status = "disabled"; }; + nfc: nand-controller@ff4b0000 { + compatible = "rockchip,rk3308-nfc", + "rockchip,rv1108-nfc"; + reg = <0x0 0xff4b0000 0x0 0x4000>; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>; + clock-names = "ahb", "nfc"; + assigned-clocks = <&cru SCLK_NANDC>; + assigned-clock-rates = <150000000>; + pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0 + &flash_rdn &flash_rdy &flash_wrn>; + pinctrl-names = "default"; + status = "disabled"; + }; + cru: clock-controller@ff500000 { compatible = "rockchip,rk3308-cru"; reg = <0x0 0xff500000 0x0 0x1000>; |