diff options
| author | Julien Thierry <julien.thierry@arm.com> | 2019-06-11 12:38:11 +0300 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2019-06-21 17:50:23 +0300 |
| commit | 48ce8f80f5901f1f031b00be66d659d39f33b0a1 (patch) | |
| tree | cc0a9df40912c904f658cc063c2e2f230eb80489 /arch/arm64/include/asm/irqflags.h | |
| parent | bd82d4bd21880b7c4d5f5756be435095d6ae07b5 (diff) | |
| download | linux-48ce8f80f5901f1f031b00be66d659d39f33b0a1.tar.xz | |
arm64: irqflags: Introduce explicit debugging for IRQ priorities
Using IRQ priority masking to enable/disable interrupts is a bit
sensitive as it requires to deal with both ICC_PMR_EL1 and PSR.I.
Introduce some validity checks to both highlight the states in which
functions dealing with IRQ enabling/disabling can (not) be called, and
bark a warning when called in an unexpected state.
Since these checks are done on hotpaths, introduce a build option to
choose whether to do the checking.
Cc: Will Deacon <will.deacon@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/irqflags.h')
| -rw-r--r-- | arch/arm64/include/asm/irqflags.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/irqflags.h b/arch/arm64/include/asm/irqflags.h index a1372722f12e..cac2d2a3c24e 100644 --- a/arch/arm64/include/asm/irqflags.h +++ b/arch/arm64/include/asm/irqflags.h @@ -40,6 +40,12 @@ */ static inline void arch_local_irq_enable(void) { + if (system_has_prio_mask_debugging()) { + u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1); + + WARN_ON_ONCE(pmr != GIC_PRIO_IRQON && pmr != GIC_PRIO_IRQOFF); + } + asm volatile(ALTERNATIVE( "msr daifclr, #2 // arch_local_irq_enable\n" "nop", @@ -53,6 +59,12 @@ static inline void arch_local_irq_enable(void) static inline void arch_local_irq_disable(void) { + if (system_has_prio_mask_debugging()) { + u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1); + + WARN_ON_ONCE(pmr != GIC_PRIO_IRQON && pmr != GIC_PRIO_IRQOFF); + } + asm volatile(ALTERNATIVE( "msr daifset, #2 // arch_local_irq_disable", __msr_s(SYS_ICC_PMR_EL1, "%0"), |