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| author | Marc Zyngier <maz@kernel.org> | 2019-01-02 15:34:25 +0300 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2020-07-07 11:28:37 +0300 |
| commit | efaa5b93afde088411b67a0dde34e67aedc6e72f (patch) | |
| tree | 5f160be703849abc5a12dba27dfa05ae758ffffe /arch/arm64/include/asm/kvm_asm.h | |
| parent | a0e50aa3f4a8a5c9fb791b8f32d624e2a1a735bd (diff) | |
| download | linux-efaa5b93afde088411b67a0dde34e67aedc6e72f.tar.xz | |
KVM: arm64: Use TTL hint in when invalidating stage-2 translations
Since we often have a precise idea of the level we're dealing with
when invalidating TLBs, we can provide it to as a hint to our
invalidation helper.
Reviewed-by: James Morse <james.morse@arm.com>
Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'arch/arm64/include/asm/kvm_asm.h')
| -rw-r--r-- | arch/arm64/include/asm/kvm_asm.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h index 18d39b30d9c9..61f654a4ae00 100644 --- a/arch/arm64/include/asm/kvm_asm.h +++ b/arch/arm64/include/asm/kvm_asm.h @@ -91,7 +91,8 @@ DECLARE_KVM_HYP_SYM(__bp_harden_hyp_vecs); #endif extern void __kvm_flush_vm_context(void); -extern void __kvm_tlb_flush_vmid_ipa(struct kvm_s2_mmu *mmu, phys_addr_t ipa); +extern void __kvm_tlb_flush_vmid_ipa(struct kvm_s2_mmu *mmu, phys_addr_t ipa, + int level); extern void __kvm_tlb_flush_vmid(struct kvm_s2_mmu *mmu); extern void __kvm_tlb_flush_local_vmid(struct kvm_s2_mmu *mmu); |