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authorJohnny Huang <johnny_huang@aspeedtech.com>2022-03-29 20:39:31 +0300
committerJoel Stanley <joel@jms.id.au>2022-03-31 08:41:58 +0300
commit8bbef473910840f42b7e1ac933c5ad733b892cdc (patch)
treef98611ca94c0e9db73056d5ce34161cb93ecfe31 /arch/arm
parent7d672f6a57a29bcbdb68da671e85fb20ac80f0b2 (diff)
downloadlinux-8bbef473910840f42b7e1ac933c5ad733b892cdc.tar.xz
ARM: dts: aspeed-g6: add FWQSPI group in pinctrl dtsi
Add FWSPIDQ2 and FWSPIDQ3 group to support AST2600 FW SPI quad mode. These pins can be used with dedicated FW SPI pins - FWSPICS0#, FWSPICK, FWSPIMOSI and FWSPIMISO. OpenBMC-Staging-Count: 1 Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com> Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20220329173932.2588289-7-quic_jaehyoo@quicinc.com Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi b/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
index 06d60a8540e9..47c3fb137cbc 100644
--- a/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
@@ -117,6 +117,11 @@
groups = "FWSPID";
};
+ pinctrl_fwqspi_default: fwqspi_default {
+ function = "FWQSPI";
+ groups = "FWQSPI";
+ };
+
pinctrl_fwspiwp_default: fwspiwp_default {
function = "FWSPIWP";
groups = "FWSPIWP";