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| author | Vernon Mauery <vernon.mauery@linux.intel.com> | 2019-09-12 10:55:39 +0300 |
|---|---|---|
| committer | Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> | 2021-11-05 10:22:05 +0300 |
| commit | bda134ac56c65e4f45a1c930dfab43e1e5987987 (patch) | |
| tree | 87d8b950e0e1b8de5557a61b948717b0681b402b /arch/arm | |
| parent | c9abdd3de032f4cac4d95e0b1c15af92d2ae497b (diff) | |
| download | linux-bda134ac56c65e4f45a1c930dfab43e1e5987987.tar.xz | |
arm: dts: base aspeed g6 dtsi fixups
Additions to the base g6 dtsi file for Aspeed ast2600 systems.
This mostly includes entries for the drivers that are not upstream.
Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/aspeed-g6.dtsi | 106 |
1 files changed, 104 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index 06e9ff562d65..b121871cefbe 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -29,6 +29,12 @@ i2c13 = &i2c13; i2c14 = &i2c14; i2c15 = &i2c15; + i3c0 = &i3c0; + i3c1 = &i3c1; + i3c2 = &i3c2; + i3c3 = &i3c3; + i3c4 = &i3c4; + i3c5 = &i3c5; serial0 = &uart1; serial1 = &uart2; serial2 = &uart3; @@ -388,7 +394,7 @@ #gpio-cells = <2>; gpio-controller; compatible = "aspeed,ast2600-gpio"; - reg = <0x1e780000 0x400>; + reg = <0x1e780000 0x200>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; gpio-ranges = <&pinctrl 0 0 208>; ngpios = <208>; @@ -429,7 +435,7 @@ #gpio-cells = <2>; gpio-controller; compatible = "aspeed,ast2600-gpio"; - reg = <0x1e780800 0x800>; + reg = <0x1e780800 0x200>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; gpio-ranges = <&pinctrl 0 208 36>; ngpios = <36>; @@ -514,6 +520,13 @@ ranges = <0x0 0x1e78b000 0x100>; }; + i3c: bus@1e7a0000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1e7a0000 0x8000>; + }; + lpc: lpc@1e789000 { compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon"; reg = <0x1e789000 0x1000>; @@ -590,6 +603,7 @@ interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; + }; sdc: sdc@1e740000 { @@ -993,3 +1007,91 @@ status = "disabled"; }; }; + +&i3c { + i3c0: i3c0@2000 { + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + reg = <0x2000 0x1000>; + compatible = "snps,dw-i3c-master-1.00a"; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_I3C0>; + bus-frequency = <100000>; + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + i3c1: i3c1@3000 { + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + reg = <0x3000 0x1000>; + compatible = "snps,dw-i3c-master-1.00a"; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_I3C1>; + bus-frequency = <100000>; + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + i3c2: i3c2@4000 { + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + reg = <0x4000 0x1000>; + compatible = "snps,dw-i3c-master-1.00a"; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_I3C2>; + bus-frequency = <100000>; + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i3c3_default>; + status = "disabled"; + }; + + i3c3: i3c3@5000 { + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + reg = <0x5000 0x1000>; + compatible = "snps,dw-i3c-master-1.00a"; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_I3C3>; + bus-frequency = <100000>; + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i3c4_default>; + status = "disabled"; + }; + + i3c4: i3c4@6000 { + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + reg = <0x6000 0x1000>; + compatible = "snps,dw-i3c-master-1.00a"; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_I3C4>; + bus-frequency = <100000>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i3c5_default>; + status = "disabled"; + }; + + i3c5: i3c5@7000 { + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + reg = <0x7000 0x1000>; + compatible = "snps,dw-i3c-master-1.00a"; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_I3C5>; + bus-frequency = <100000>; + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i3c6_default>; + status = "disabled"; + }; +}; |