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author | Paul Burton <paul.burton@mips.com> | 2018-08-07 20:15:04 +0300 |
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committer | Paul Burton <paul.burton@mips.com> | 2018-08-07 20:33:45 +0300 |
commit | 36dc5b20e31db5cd470eb1934815320e7a0434c3 (patch) | |
tree | 118a47c62d73c07c0caad4006fce201bc070f385 /arch/mips/vdso | |
parent | 08eeb44b2466feb1cf98fb0e8e6a1cf932ece6df (diff) | |
download | linux-36dc5b20e31db5cd470eb1934815320e7a0434c3.tar.xz |
MIPS: Use dins to simplify __write_64bit_c0_split()
The code in __write_64bit_c0_split() is used by MIPS32 kernels running
on MIPS64 CPUs to write a 64-bit value to a 64-bit coprocessor 0
register using a single 64-bit dmtc0 instruction. It does this by
combining the 2x 32-bit registers used to hold the 64-bit value into a
single register, which in the existing code involves three steps:
1) Zero extend register A which holds bits 31:0 of our data, since it
may have previously held a sign-extended value.
2) Shift register B which holds bits 63:32 of our data in bits 31:0
left by 32 bits, such that the bits forming our data are in the
position they'll be in the final 64-bit value & bits 31:0 of the
register are zero.
3) Or the two registers together to form the 64-bit value in one
64-bit register.
From MIPS r2 onwards we have a dins instruction which can effectively
perform all 3 of those steps using a single instruction.
Add a path for MIPS r2 & beyond which uses dins to take bits 31:0 from
register B & insert them into bits 63:32 of register A, giving us our
full 64-bit value in register A with one instruction.
Since we know that MIPS r2 & above support the sel field for the dmtc0
instruction, we don't bother special casing sel==0. Omiting the sel
field would assemble to exactly the same instruction as when we
explicitly specify that it equals zero.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Diffstat (limited to 'arch/mips/vdso')
0 files changed, 0 insertions, 0 deletions