summaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
authorKevin Cernekee <cernekee@gmail.com>2014-10-21 08:27:58 +0400
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 09:45:11 +0300
commitbbf2ba67cdbdb3676a661c3eba5572d1e513627f (patch)
tree92cdfa8bfd348cacb28b4cd70117afe5d762ec8d /arch
parenta7ef1eaddbf4bd50bfee92d9dfbecadc61467bbf (diff)
downloadlinux-bbf2ba67cdbdb3676a661c3eba5572d1e513627f.tar.xz
MIPS: BMIPS: Select the appropriate L1_CACHE_SHIFT for 438x and 5000 CPUs
BMIPS438x has a 64-byte D$ line size and BMIPS5000 has a 128-byte L2 line size. If L1_CACHE_SHIFT is undersized, DMA buffers will not be cacheline-aligned and terrible things will happen. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: mbizon@freebox.fr Cc: jogo@openwrt.org Cc: jfraser@broadcom.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8164/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/Kconfig2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 992f98361e5a..002cf4c56ebf 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1587,12 +1587,14 @@ config CPU_BMIPS4350
config CPU_BMIPS4380
bool
+ select MIPS_L1_CACHE_SHIFT_6
select SYS_SUPPORTS_SMP
select SYS_SUPPORTS_HOTPLUG_CPU
config CPU_BMIPS5000
bool
select MIPS_CPU_SCACHE
+ select MIPS_L1_CACHE_SHIFT_7
select SYS_SUPPORTS_SMP
select SYS_SUPPORTS_HOTPLUG_CPU