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authorJae Hyun Yoo <jae.hyun.yoo@intel.com>2019-02-12 04:02:35 +0300
committerJae Hyun Yoo <jae.hyun.yoo@linux.intel.com>2021-11-05 10:22:07 +0300
commitf5b63d083feb8183c81a9db6ef5152401797a60a (patch)
tree496025d01321bf143e6b2cf48e0ff445f46a9272 /arch
parent26db00c31eaf0f99b080df0607b94ea7c9383513 (diff)
downloadlinux-f5b63d083feb8183c81a9db6ef5152401797a60a.tar.xz
Add Aspeed PWM driver which uses FTTMR010 timer IP
This commit adds Aspeed PWM driver which uses timer pulse output feature in Aspeed SoCs. The timer IP is derived from Faraday Technologies FTTMR010 IP but has some customized register structure changes only for Aspeed SoCs. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/aspeed-g5.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index fb648d7d5a11..f2d8de61bfc2 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -366,7 +366,7 @@
timer: timer@1e782000 {
/* This timer is a Faraday FTTMR010 derivative */
- compatible = "aspeed,ast2400-timer";
+ compatible = "aspeed,ast2500-timer";
reg = <0x1e782000 0x90>;
interrupts = <16 17 18 35 36 37 38 39>;
clocks = <&syscon ASPEED_CLK_APB>;