diff options
| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2021-10-11 14:27:14 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-11-18 21:16:56 +0300 |
| commit | 33dcebb916a296e97d6d014386af8f56bd10d79c (patch) | |
| tree | a0af32186f19accb33c9156019eaab34f6c2e36e /drivers/clk | |
| parent | ffe896d043ca1806e2b24f687dfcd520f2f663ed (diff) | |
| download | linux-33dcebb916a296e97d6d014386af8f56bd10d79c.tar.xz | |
clk: at91: clk-master: fix prescaler logic
[ Upstream commit 0ef99f8202c5078a72c05af76bfaed2ea4daab19 ]
When prescaler value read from register is MASTER_PRES_MAX it means
that the input clock will be divided by 3. Fix the code to reflect
this.
Fixes: 7a110b9107ed8 ("clk: at91: clk-master: re-factor master clock")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20211011112719.3951784-11-claudiu.beznea@microchip.com
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/at91/clk-master.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c index 2e410815a340..04d0dd838594 100644 --- a/drivers/clk/at91/clk-master.c +++ b/drivers/clk/at91/clk-master.c @@ -309,7 +309,7 @@ static unsigned long clk_master_pres_recalc_rate(struct clk_hw *hw, spin_unlock_irqrestore(master->lock, flags); pres = (val >> master->layout->pres_shift) & MASTER_PRES_MASK; - if (pres == 3 && characteristics->have_div3_pres) + if (pres == MASTER_PRES_MAX && characteristics->have_div3_pres) pres = 3; else pres = (1 << pres); |