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author | Dan Williams <dan.j.williams@intel.com> | 2022-01-24 03:29:42 +0300 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2022-04-08 15:23:30 +0300 |
commit | 0e348f94787fe58c1d970e44a4d68538469755d6 (patch) | |
tree | 82006b0ec018fcf2722b9dab6af172435ac17ba5 /drivers/cxl | |
parent | 855f1c64e21ed72f965ea30cdfaf8443b2ebfcf3 (diff) | |
download | linux-0e348f94787fe58c1d970e44a4d68538469755d6.tar.xz |
cxl/core: Fix cxl_probe_component_regs() error message
[ Upstream commit d621bc2e7282f9955033a6359877fd4ac4be60e1 ]
Fix a '\n' vs '/n' typo.
Fixes: 08422378c4ad ("cxl/pci: Add HDM decoder capabilities")
Acked-by: Ben Widawsky <ben.widawsky@intel.com
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/164298418268.3018233.17790073375430834911.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/cxl')
-rw-r--r-- | drivers/cxl/core/regs.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/cxl/core/regs.c b/drivers/cxl/core/regs.c index 41de4a136ecd..b8aa583a7642 100644 --- a/drivers/cxl/core/regs.c +++ b/drivers/cxl/core/regs.c @@ -49,7 +49,7 @@ void cxl_probe_component_regs(struct device *dev, void __iomem *base, if (FIELD_GET(CXL_CM_CAP_HDR_ID_MASK, cap_array) != CM_CAP_HDR_CAP_ID) { dev_err(dev, - "Couldn't locate the CXL.cache and CXL.mem capability array header./n"); + "Couldn't locate the CXL.cache and CXL.mem capability array header.\n"); return; } |