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author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-09-18 05:04:40 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-09-18 05:04:40 +0300 |
commit | 04cbfba6208592999d7bfe6609ec01dc3fde73f5 (patch) | |
tree | 78182160d45c82792a3a8607d3f95b87703dbfa9 /drivers/dma/dw/of.c | |
parent | 4feaab05dc1eda3dbb57b097377766002e7a7cb9 (diff) | |
parent | c5c6faaee6e0c374c7dfaf053aa23750f5a68e20 (diff) | |
download | linux-04cbfba6208592999d7bfe6609ec01dc3fde73f5.tar.xz |
Merge tag 'dmaengine-5.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma
Pull dmaengine updates from Vinod Koul:
- Move Dmaengine DT bindings to YAML and convert Allwinner to schema.
- FSL dma device_synchronize implementation
- DW split acpi and of helpers and updates to driver and support for
Elkhart Lake
- Move filter fn as private for omap-dma and edma drivers and
improvements to these drivers
- Mark expected switch fall-through in couple of drivers
- Renames of shdma and nbpfaxi binding document
- Minor updates to bunch of drivers
* tag 'dmaengine-5.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (55 commits)
dmaengine: ti: edma: Use bitmap_set() instead of open coded edma_set_bits()
dmaengine: ti: edma: Only reset region0 access registers
dmaengine: ti: edma: Do not reset reserved paRAM slots
dmaengine: iop-adma.c: fix printk format warning
dmaengine: stm32-dma: Use struct_size() helper
dt-bindings: dmaengine: dma-common: Fix the dma-channel-mask property
dmanegine: ioat/dca: Use struct_size() helper
dmaengine: iop-adma: remove set but not used variable 'slots_per_op'
dmaengine: dmatest: Add support for completion polling
dmaengine: ti: omap-dma: Remove variable override in omap_dma_tx_status()
dmaengine: ti: omap-dma: Remove 'Assignment in if condition'
dmaengine: ti: edma: Remove 'Assignment in if condition'
dmaengine: dw: platform: Split OF helpers to separate module
dmaengine: dw: platform: Split ACPI helpers to separate module
dmaengine: dw: platform: Move handle check to dw_dma_acpi_controller_register()
dmaengine: dw: platform: Switch to acpi_dma_controller_register()
dmaengine: dw: platform: Use devm_platform_ioremap_resource()
dmaengine: dw: platform: Enable iDMA 32-bit on Intel Elkhart Lake
dmaengine: dw: platform: Use struct dw_dma_chip_pdata
dmaengine: dw: Export struct dw_dma_chip_pdata for wider use
...
Diffstat (limited to 'drivers/dma/dw/of.c')
-rw-r--r-- | drivers/dma/dw/of.c | 131 |
1 files changed, 131 insertions, 0 deletions
diff --git a/drivers/dma/dw/of.c b/drivers/dma/dw/of.c new file mode 100644 index 000000000000..9e27831dee32 --- /dev/null +++ b/drivers/dma/dw/of.c @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Platform driver for the Synopsys DesignWare DMA Controller + * + * Copyright (C) 2007-2008 Atmel Corporation + * Copyright (C) 2010-2011 ST Microelectronics + * Copyright (C) 2013 Intel Corporation + */ + +#include <linux/of.h> +#include <linux/of_dma.h> +#include <linux/platform_device.h> + +#include "internal.h" + +static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct dw_dma *dw = ofdma->of_dma_data; + struct dw_dma_slave slave = { + .dma_dev = dw->dma.dev, + }; + dma_cap_mask_t cap; + + if (dma_spec->args_count != 3) + return NULL; + + slave.src_id = dma_spec->args[0]; + slave.dst_id = dma_spec->args[0]; + slave.m_master = dma_spec->args[1]; + slave.p_master = dma_spec->args[2]; + + if (WARN_ON(slave.src_id >= DW_DMA_MAX_NR_REQUESTS || + slave.dst_id >= DW_DMA_MAX_NR_REQUESTS || + slave.m_master >= dw->pdata->nr_masters || + slave.p_master >= dw->pdata->nr_masters)) + return NULL; + + dma_cap_zero(cap); + dma_cap_set(DMA_SLAVE, cap); + + /* TODO: there should be a simpler way to do this */ + return dma_request_channel(cap, dw_dma_filter, &slave); +} + +struct dw_dma_platform_data *dw_dma_parse_dt(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + struct dw_dma_platform_data *pdata; + u32 tmp, arr[DW_DMA_MAX_NR_MASTERS], mb[DW_DMA_MAX_NR_CHANNELS]; + u32 nr_masters; + u32 nr_channels; + + if (!np) { + dev_err(&pdev->dev, "Missing DT data\n"); + return NULL; + } + + if (of_property_read_u32(np, "dma-masters", &nr_masters)) + return NULL; + if (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS) + return NULL; + + if (of_property_read_u32(np, "dma-channels", &nr_channels)) + return NULL; + if (nr_channels > DW_DMA_MAX_NR_CHANNELS) + return NULL; + + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return NULL; + + pdata->nr_masters = nr_masters; + pdata->nr_channels = nr_channels; + + if (!of_property_read_u32(np, "chan_allocation_order", &tmp)) + pdata->chan_allocation_order = (unsigned char)tmp; + + if (!of_property_read_u32(np, "chan_priority", &tmp)) + pdata->chan_priority = tmp; + + if (!of_property_read_u32(np, "block_size", &tmp)) + pdata->block_size = tmp; + + if (!of_property_read_u32_array(np, "data-width", arr, nr_masters)) { + for (tmp = 0; tmp < nr_masters; tmp++) + pdata->data_width[tmp] = arr[tmp]; + } else if (!of_property_read_u32_array(np, "data_width", arr, nr_masters)) { + for (tmp = 0; tmp < nr_masters; tmp++) + pdata->data_width[tmp] = BIT(arr[tmp] & 0x07); + } + + if (!of_property_read_u32_array(np, "multi-block", mb, nr_channels)) { + for (tmp = 0; tmp < nr_channels; tmp++) + pdata->multi_block[tmp] = mb[tmp]; + } else { + for (tmp = 0; tmp < nr_channels; tmp++) + pdata->multi_block[tmp] = 1; + } + + if (!of_property_read_u32(np, "snps,dma-protection-control", &tmp)) { + if (tmp > CHAN_PROTCTL_MASK) + return NULL; + pdata->protctl = tmp; + } + + return pdata; +} + +void dw_dma_of_controller_register(struct dw_dma *dw) +{ + struct device *dev = dw->dma.dev; + int ret; + + if (!dev->of_node) + return; + + ret = of_dma_controller_register(dev->of_node, dw_dma_of_xlate, dw); + if (ret) + dev_err(dev, "could not register of_dma_controller\n"); +} + +void dw_dma_of_controller_free(struct dw_dma *dw) +{ + struct device *dev = dw->dma.dev; + + if (!dev->of_node) + return; + + of_dma_controller_free(dev->of_node); +} |