Merge tag 'dmaengine-4.20-rc1' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine updates from Vinod Koul:

 - Support for ColdFire mcf5441x edma controller

 - Support for link list mode in sprd dma

 - More users of managed dmaenginem_async_device_register API

 - Cyclic mode support in owl dma driver

 - DT updates for renesas drivers, dma-jz4780 updates and support for
   JZ4770, JZ4740 and JZ4725B controllers

 - Removal of deprecated dma_slave_config direction in dmaengine
   drivers, few more users will be removed in next cycle and eventually
   removed.

 - Minor updates to idma64, ioat, pxa, ppc drivers

* tag 'dmaengine-4.20-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (66 commits)
  dmaengine: ppc4xx: fix off-by-one build failure
  dmaengine: owl: Fix warnings generated during build
  dmaengine: fsl-edma: remove dma_slave_config direction usage
  dmaengine: rcar-dmac: set scatter/gather max segment size
  dmaengine: mmp_tdma: remove dma_slave_config direction usage
  dmaengine: ep93xx_dma: remove dma_slave_config direction usage
  dmaengine: k3dma: remove dma_slave_config direction usage
  dmaengine: k3dma: dont use direction for memcpy
  dmaengine: imx-dma: remove dma_slave_config direction usage
  dmaengine: idma: remove dma_slave_config direction usage
  dmaengine: hsu: remove dma_slave_config direction usage
  dmaengine: dw: remove dma_slave_config direction usage
  dmaengine: jz4740: remove dma_slave_config direction usage
  dmaengine: coh901318: remove dma_slave_config direction usage
  dmaengine: bcm2835: remove dma_slave_config direction usage
  dmaengine: at_hdmac: remove dma_slave_config direction usage
  dmaengine: owl: Add Slave and Cyclic mode support for Actions Semi Owl S900 SoC
  dmaengine: ioat: fix prototype of ioat_enumerate_channels
  dmaengine: stm32-dma: check whether length is aligned on FIFO threshold
  dt-bindings: dmaengine: usb-dmac: Add binding for r8a7744
  ...

1 files changed, 22 insertions, 14 deletions

diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c
index 6bfa217ed6d0..fdec2b6cfbb0 100644
--- a/drivers/dma/k3dma.c
+++ b/drivers/dma/k3dma.c
@@ -87,10 +87,10 @@ struct k3_dma_chan {
 	struct virt_dma_chan	vc;
 	struct k3_dma_phy	*phy;
 	struct list_head	node;
-	enum dma_transfer_direction dir;
 	dma_addr_t		dev_addr;
 	enum dma_status		status;
 	bool			cyclic;
+	struct dma_slave_config	slave_config;
 };
 
 struct k3_dma_phy {
@@ -118,6 +118,10 @@ struct k3_dma_dev {
 
 #define to_k3_dma(dmadev) container_of(dmadev, struct k3_dma_dev, slave)
 
+static int k3_dma_config_write(struct dma_chan *chan,
+			       enum dma_transfer_direction dir,
+			       struct dma_slave_config *cfg);
+
 static struct k3_dma_chan *to_k3_chan(struct dma_chan *chan)
 {
 	return container_of(chan, struct k3_dma_chan, vc.chan);
@@ -501,14 +505,8 @@ static struct dma_async_tx_descriptor *k3_dma_prep_memcpy(
 		copy = min_t(size_t, len, DMA_MAX_SIZE);
 		k3_dma_fill_desc(ds, dst, src, copy, num++, c->ccfg);
 
-		if (c->dir == DMA_MEM_TO_DEV) {
-			src += copy;
-		} else if (c->dir == DMA_DEV_TO_MEM) {
-			dst += copy;
-		} else {
-			src += copy;
-			dst += copy;
-		}
+		src += copy;
+		dst += copy;
 		len -= copy;
 	} while (len);
 
@@ -542,6 +540,7 @@ static struct dma_async_tx_descriptor *k3_dma_prep_slave_sg(
 	if (!ds)
 		return NULL;
 	num = 0;
+	k3_dma_config_write(chan, dir, &c->slave_config);
 
 	for_each_sg(sgl, sg, sglen, i) {
 		addr = sg_dma_address(sg);
@@ -602,6 +601,7 @@ k3_dma_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr,
 	avail = buf_len;
 	total = avail;
 	num = 0;
+	k3_dma_config_write(chan, dir, &c->slave_config);
 
 	if (period_len < modulo)
 		modulo = period_len;
@@ -642,18 +642,26 @@ static int k3_dma_config(struct dma_chan *chan,
 			 struct dma_slave_config *cfg)
 {
 	struct k3_dma_chan *c = to_k3_chan(chan);
+
+	memcpy(&c->slave_config, cfg, sizeof(*cfg));
+
+	return 0;
+}
+
+static int k3_dma_config_write(struct dma_chan *chan,
+			       enum dma_transfer_direction dir,
+			       struct dma_slave_config *cfg)
+{
+	struct k3_dma_chan *c = to_k3_chan(chan);
 	u32 maxburst = 0, val = 0;
 	enum dma_slave_buswidth width = DMA_SLAVE_BUSWIDTH_UNDEFINED;
 
-	if (cfg == NULL)
-		return -EINVAL;
-	c->dir = cfg->direction;
-	if (c->dir == DMA_DEV_TO_MEM) {
+	if (dir == DMA_DEV_TO_MEM) {
 		c->ccfg = CX_CFG_DSTINCR;
 		c->dev_addr = cfg->src_addr;
 		maxburst = cfg->src_maxburst;
 		width = cfg->src_addr_width;
-	} else if (c->dir == DMA_MEM_TO_DEV) {
+	} else if (dir == DMA_MEM_TO_DEV) {
 		c->ccfg = CX_CFG_SRCINCR;
 		c->dev_addr = cfg->dst_addr;
 		maxburst = cfg->dst_maxburst;