diff options
| author | Vandita Kulkarni <vandita.kulkarni@intel.com> | 2021-05-14 18:36:55 +0300 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2021-05-15 05:46:08 +0300 |
| commit | 6ee9dea52a65cdc080599890cc66d9de51a78163 (patch) | |
| tree | 1664c81d1c7af58fb9a97b78cd2698cdd21dc5f7 /drivers/gpu/drm/i915/display | |
| parent | 1003cee29fb0bd60c293579bbc4ed50bab39f40f (diff) | |
| download | linux-6ee9dea52a65cdc080599890cc66d9de51a78163.tar.xz | |
drm/i915/display/dsc: Refactor intel_dp_dsc_compute_bpp
Move the platform specific max bpc calculation into
intel_dp_dsc_compute_bpp function
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-4-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 0586cf8c2bfb..9f699d3a2a54 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1097,10 +1097,18 @@ intel_dp_compute_link_config_wide(struct intel_dp *intel_dp, return -EINVAL; } -static int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8 dsc_max_bpc) +static int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8 max_req_bpc) { + struct drm_i915_private *i915 = dp_to_i915(intel_dp); int i, num_bpc; u8 dsc_bpc[3] = {0}; + u8 dsc_max_bpc; + + /* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */ + if (DISPLAY_VER(i915) >= 12) + dsc_max_bpc = min_t(u8, 12, max_req_bpc); + else + dsc_max_bpc = min_t(u8, 10, max_req_bpc); num_bpc = drm_dp_dsc_sink_supported_input_bpcs(intel_dp->dsc_dpcd, dsc_bpc); @@ -1188,7 +1196,6 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; - u8 dsc_max_bpc; int pipe_bpp; int ret; @@ -1198,14 +1205,7 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, if (!intel_dp_supports_dsc(intel_dp, pipe_config)) return -EINVAL; - /* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */ - if (DISPLAY_VER(dev_priv) >= 12) - dsc_max_bpc = min_t(u8, 12, conn_state->max_requested_bpc); - else - dsc_max_bpc = min_t(u8, 10, - conn_state->max_requested_bpc); - - pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, dsc_max_bpc); + pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc); /* Min Input BPC for ICL+ is 8 */ if (pipe_bpp < 8 * 3) { |