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author | Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2019-10-25 15:17:18 +0300 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-10-25 20:29:05 +0300 |
commit | ba1d18e386d991356f59bbb417b0c642abf671fa (patch) | |
tree | bef606309697d880deb8f4f6196403a77e98a748 /drivers/gpu/drm/i915/i915_gpu_error.h | |
parent | dd5279c71405533d4ddbb9453effc60f0f5bf211 (diff) | |
download | linux-ba1d18e386d991356f59bbb417b0c642abf671fa.tar.xz |
drm/i915: capture aux page table error register
TGL introduced a feature in which we map the main surface to the
auxiliary surface. If we screw up the page tables, the HW has a
register to tell us which engine encounters a fault in the page table
walk.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
[ickle: Be brave and apply to gen12]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191025121718.18806-1-lionel.g.landwerlin@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gpu_error.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gpu_error.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h index 4dc36d6ee3a2..c7f36be2a38e 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.h +++ b/drivers/gpu/drm/i915/i915_gpu_error.h @@ -74,6 +74,7 @@ struct i915_gpu_state { u32 gab_ctl; u32 gfx_mode; u32 gtt_cache; + u32 aux_err; /* gen12 */ u32 nfence; u64 fence[I915_MAX_NUM_FENCES]; |