drm/msm/dp: add support for DP PLL driver

Add the needed DP PLL specific files to support
display port interface on msm targets.

The DP driver calls the DP PLL driver registration.
The DP driver sets the link and pixel clock sources.

Changes in v2:
-- Update copyright markings on all relevant files.
-- Use DRM_DEBUG_DP for debug msgs.

Changes in v4:
-- Update the DP link clock provider names

Changes in V5:
-- Addressed comments from Stephen Boyd, Rob clark.

Changes in V6:
-- Remove PLL as separate driver and include PLL as DP module
-- Remove redundant clock parsing from PLL module and make DP as
   clock provider
-- Map USB3 DPCOM and PHY IO using hardcoded register address and
   move mapping form parser to PLL module
-- Access DP PHY modules from same base address using offsets instead of
   deriving base address of individual module from device tree.
-- Remove dp_pll_10nm_util.c and include its functionality in
   dp_pll_10nm.c
-- Introduce new data structures private to PLL module

Changes in v7:

-- Remove DRM_MSM_DP_PLL config from Makefile and Kconfig
-- Remove set_parent from determin_rate API
-- Remove phy_pll_vco_div_clk from parent list
-- Remove flag CLK_DIVIDER_ONE_BASED
-- Remove redundant cell-index property parsing

Changes in v8:

-- Unregister hardware clocks during driver cleanup

Changes in v9:

-- Remove redundant Kconfig option DRM_MSM_DP_10NM_PLL

Changes in v10:

-- Limit 10nm PLL function scope

Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Signed-off-by: Tanmay Shah <tanmay@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>

1 files changed, 21 insertions, 10 deletions

diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/dp_catalog.c
index 0ffde1a74852..d27e17d7d18c 100644
--- a/drivers/gpu/drm/msm/dp/dp_catalog.c
+++ b/drivers/gpu/drm/msm/dp/dp_catalog.c
@@ -5,6 +5,7 @@
 
 #define pr_fmt(fmt)	"[drm-dp] %s: " fmt, __func__
 
+#include <linux/rational.h>
 #include <linux/delay.h>
 #include <linux/iopoll.h>
 #include <linux/rational.h>
@@ -131,51 +132,58 @@ static inline void dp_write_ahb(struct dp_catalog_private *catalog,
 static inline void dp_write_phy(struct dp_catalog_private *catalog,
 			       u32 offset, u32 data)
 {
+	offset += DP_PHY_REG_OFFSET;
 	/*
 	 * To make sure phy reg writes happens before any other operation,
 	 * this function uses writel() instread of writel_relaxed()
 	 */
-	writel(data, catalog->io->phy_io.base + offset);
+	writel(data, catalog->io->phy_reg.base + offset);
 }
 
 static inline u32 dp_read_phy(struct dp_catalog_private *catalog,
 			       u32 offset)
 {
+	offset += DP_PHY_REG_OFFSET;
 	/*
 	 * To make sure phy reg writes happens before any other operation,
 	 * this function uses writel() instread of writel_relaxed()
 	 */
-	return readl_relaxed(catalog->io->phy_io.base + offset);
+	return readl_relaxed(catalog->io->phy_reg.base + offset);
 }
 
 static inline void dp_write_pll(struct dp_catalog_private *catalog,
 			       u32 offset, u32 data)
 {
-	writel_relaxed(data, catalog->io->dp_pll_io.base + offset);
+	offset += DP_PHY_PLL_OFFSET;
+	writel_relaxed(data, catalog->io->phy_reg.base + offset);
 }
 
 static inline void dp_write_ln_tx0(struct dp_catalog_private *catalog,
 			       u32 offset, u32 data)
 {
-	writel_relaxed(data, catalog->io->ln_tx0_io.base + offset);
+	offset += DP_PHY_LN_TX0_OFFSET;
+	writel_relaxed(data, catalog->io->phy_reg.base + offset);
 }
 
 static inline void dp_write_ln_tx1(struct dp_catalog_private *catalog,
 			       u32 offset, u32 data)
 {
-	writel_relaxed(data, catalog->io->ln_tx1_io.base + offset);
+	offset += DP_PHY_LN_TX1_OFFSET;
+	writel_relaxed(data, catalog->io->phy_reg.base + offset);
 }
 
 static inline u32 dp_read_ln_tx0(struct dp_catalog_private *catalog,
 			       u32 offset)
 {
-	return readl_relaxed(catalog->io->ln_tx0_io.base + offset);
+	offset += DP_PHY_LN_TX0_OFFSET;
+	return readl_relaxed(catalog->io->phy_reg.base + offset);
 }
 
 static inline u32 dp_read_ln_tx1(struct dp_catalog_private *catalog,
 			       u32 offset)
 {
-	return readl_relaxed(catalog->io->ln_tx1_io.base + offset);
+	offset += DP_PHY_LN_TX1_OFFSET;
+	return readl_relaxed(catalog->io->phy_reg.base + offset);
 }
 
 static inline void dp_write_usb_cm(struct dp_catalog_private *catalog,
@@ -398,13 +406,16 @@ void dp_catalog_dump_regs(struct dp_catalog *dp_catalog)
 	dump_regs(catalog->io->usb3_dp_com.base, catalog->io->usb3_dp_com.len);
 
 	pr_info("LN TX0 regs\n");
-	dump_regs(catalog->io->ln_tx0_io.base, catalog->io->ln_tx0_io.len);
+	dump_regs(catalog->io->phy_reg.base + DP_PHY_LN_TX0_OFFSET,
+						DP_PHY_LN_TX0_SIZE);
 
 	pr_info("LN TX1 regs\n");
-	dump_regs(catalog->io->ln_tx1_io.base, catalog->io->ln_tx1_io.len);
+	dump_regs(catalog->io->phy_reg.base + DP_PHY_LN_TX1_OFFSET,
+						DP_PHY_LN_TX1_SIZE);
 
 	pr_info("DP PHY regs\n");
-	dump_regs(catalog->io->phy_io.base, catalog->io->phy_io.len);
+	dump_regs(catalog->io->phy_reg.base + DP_PHY_REG_OFFSET,
+						DP_PHY_REG_SIZE);
 }
 
 void dp_catalog_aux_setup(struct dp_catalog *dp_catalog)